Commit Graph

281 Commits

Author SHA1 Message Date
813e7cae2f Increase memtool max block size to 512 K 2024-07-09 20:58:55 +02:00
9ed8f812c8 Make our own init script
The problem with the Stage 1 script is that is spawning another tee
process to forward the output to the console, but this is not required.
So let's only keep the memtool running by creating our own init script.
2024-07-09 20:54:55 +02:00
c6726cce28 Reduce blocksize in memtool to 64K
Let's see if we can hang a bit later on.
2024-07-09 17:58:12 +02:00
4707a8b143 Simplify boot parameters and document options 2024-07-09 17:27:07 +02:00
b8f1ca672f Run the memtool as first program 2024-07-09 17:25:48 +02:00
d488c0b3b7 Always run memtool at the start 2024-07-09 17:06:50 +02:00
5a88ed36b4 Managed to reproduce the crash consistently! 2024-07-09 15:38:52 +02:00
f617efdcac Add memtool program to test the memory 2024-07-09 15:16:05 +02:00
82630f3eef Enable CONFIG_BUG again
It doesn't seem to make any difference, and it would be good in case it
catches a bug.
2024-07-09 12:35:53 +02:00
dd6082e805 Add results of changing the CSR
It seems to arrive to systemd with all-in-order, but hangs there.
2024-07-09 12:26:00 +02:00
5b34b3b97b Add csrtool to view and change CSR registers 2024-07-08 19:19:05 +02:00
bef5a6eac5 Disable CONFIG_BUG
It may be causing a loop on WARN_ON_ONCE() and page fults trying to
write to the console.
2024-07-08 18:27:29 +02:00
5f90528b51 Add bootrom support 2024-07-08 18:11:11 +02:00
66ec07a0cb Switch to two uarts bitstream 2024-07-08 13:48:20 +02:00
1f0ac64631 Add bitstream to Nix 2024-07-08 13:46:37 +02:00
4d246ad00e Enable secondary serial console 2024-07-08 10:44:51 +02:00
4641e0d9a0 Document hang missing hvc_remove trace point 2024-07-08 10:41:50 +02:00
6721e1e22c Revert "Try to use openpiton based OpenSBI config"
This reverts commit 931244a355.
2024-07-08 10:03:48 +02:00
1b4ab09c16 Select the second FPGA by default 2024-07-08 09:55:13 +02:00
931244a355 Try to use openpiton based OpenSBI config
The seem to be doing PLIC initialization based on the device tree, which
may be relevant as that is where we are defining the interruptions.
2024-07-08 09:49:34 +02:00
87b4c91813 Dump stack trace on hvc_remove 2024-07-08 08:55:50 +02:00
aaca0bb2e6 Reached stage2! 2024-07-08 08:49:21 +02:00
ef7a100c3f Disable secondary console 2024-07-08 08:49:12 +02:00
6155c7e3f8 Try to fill cache details 2024-07-08 08:48:56 +02:00
a7c460b034 Use headings to allow hrefs 2024-07-05 17:05:28 +02:00
540780e508 Remove rvb dependency for now to avoid clang 2024-07-05 16:54:14 +02:00
d52691ca33 Add journal to the repository 2024-07-05 16:53:07 +02:00
254d1bd82b flake.lock: Update
Flake lock file updates:

• Updated input 'nixpkgs':
    'github:NixOS/nixpkgs/e4ad989506ec7d71f7302cc3067abd82730a4beb' (2023-11-19)
  → 'github:NixOS/nixpkgs/9f4128e00b0ae8ec65918efeba59db998750ead6' (2024-07-03)
2024-07-05 16:31:08 +02:00
b49471ba50 Update nixpkgs to nixos-unstable 2024-07-05 16:30:29 +02:00
b903eae7e5 Disable ftrace for now as it hangs the boot 2024-07-05 16:24:51 +02:00
7e6fdff142 Disable proactive compation
I see a lot of kcompactd0 entries in sched_switch log, so disable it for
now.
2024-07-05 15:57:18 +02:00
32f4d117db Only enable sched_switch events
As sched_stat_runtime is flooding the console.
2024-07-05 15:37:50 +02:00
bc05dc2676 Mount debugfs first 2024-07-05 15:36:42 +02:00
934b67ac0b Trace sched events from stage1
Events from the kthread that dumps the buffer to the console are
filtered, otherwise we make an infinite loop.
2024-07-05 15:36:42 +02:00
f509a0a517 Enable ftrace at boot
For now we only show init calls.
2024-07-05 15:36:37 +02:00
504c4aca3c Make the counter silent by spawning another shell 2024-07-05 12:57:10 +02:00
48688594bf Add a heartbeat counter to check the kernel 2024-07-05 12:45:32 +02:00
05898c5f85 Revert UART speed to 50MHz following vivado log
> UART Name g_UART IntfLabel m_axi_uart SyncClk {Label CLK0 Freq 50000000
> Name clk_i} BaseAddr 0x0 Number 2 AxiAddrWidth 0 AxiDataWidth 0 AxiIdWidth
> 0 AxiUserWidth 0 Mode normal IRQ uart_irq
2024-07-04 17:57:26 +02:00
7eeb16ecfb Reduce frequency of UART clock to 25 MHz 2024-07-04 17:30:57 +02:00
d541462b4c Stop in the stage 1 debug shell 2024-07-04 17:28:15 +02:00
9b37e2aed0 Use the hvc0 console for the kernel 2024-07-04 17:27:43 +02:00
eb7679f6a2 Prepare device tree to accomodate another UART 2024-07-04 17:22:43 +02:00
fcf4977a65 Extend the serial range from 0x100 to 0x1000
The AXI UART 16550 v2.0 from Xilinx only seem to require 32 bytes for
the registes, but let's reduce the changes with the original DTS.
2024-07-04 16:47:56 +02:00
d5b5cc3363 Change the order of interrupts-extended for PLIC
In the SiFive DTS they are in this order, not sure it that may cause any
difference.
2024-07-04 16:46:35 +02:00
471207c64a Allow access to all memory from userspace
> If this option is disabled, you allow userspace (root) access to all
> of memory, including kernel and userspace memory

Currently is failing:

    ~ # cat /proc/iomem
    40001000-400010ff : serial
    60000000-7fffffff : Reserved
    80000000-ffefffff : System RAM
      80201000-81fa0b87 : Kernel image
        80201000-80cb177f : Kernel code
        81400000-819fffff : Kernel rodata
        81c00000-81f18747 : Kernel data
        81f19000-81fa0b87 : Kernel bss
    100000000-1bfffffff : namespace0.0

    ~ # devmem 0x40001000
    devmem: mmap: Operation not permitted
2024-07-04 12:45:41 +02:00
4826396962 Try enabling polling in the serial console 2024-07-04 11:39:35 +02:00
6531fd678c WIP: Test M and S ext interrupt 2024-07-03 20:41:16 +02:00
b1755354d0 Add support for ftrace at boot time 2024-07-03 19:36:38 +02:00
427859818c Disable SMP
The IPI extension is being used to multiplex IPI interruptions and we
don't need it as we only have one CPU.
2024-07-03 19:31:30 +02:00
4461686e80 Add dev shell without rootfs
Makes iteration quicker.
2024-07-03 18:52:51 +02:00