Prepare device tree to accomodate another UART

This commit is contained in:
Rodrigo Arias 2024-07-04 17:22:43 +02:00
parent fcf4977a65
commit eb7679f6a2

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@ -4,6 +4,12 @@
#size-cells = <2>; /* 64 bits memory addresses */ #size-cells = <2>; /* 64 bits memory addresses */
compatible = "riscv,rv64i"; compatible = "riscv,rv64i";
model = "Barcelona Supercomputing Center - Lagarto Ox (NixOS)"; model = "Barcelona Supercomputing Center - Lagarto Ox (NixOS)";
aliases {
serial0 = &uart_console; // ttyS0
serial1 = &uart_testing; // ttyS1
};
// chosen { // chosen {
// bootargs = "earlyprintk ignore_loglevel earlycon=sbi console=hvc0 root=/dev/pmem0p1 ro init=/bin/bash"; // bootargs = "earlyprintk ignore_loglevel earlycon=sbi console=hvc0 root=/dev/pmem0p1 ro init=/bin/bash";
// }; // };
@ -86,14 +92,29 @@
#size-cells = <0x00000002>; #size-cells = <0x00000002>;
compatible = "BSC,Lagarto-ox-soc", "simple-bus"; compatible = "BSC,Lagarto-ox-soc", "simple-bus";
ranges; ranges;
SERIAL: serial@40001000 {
/* For bitstream e97dd7b2-397f-11ef-abe0-bbd201a5a630 with two
* consoles */
/* The serial for the kernel console */
uart_console: serial@40001000 {
compatible = "ns16550"; compatible = "ns16550";
reg = <0x0 0x40001000 0x0 0x1000>; reg = <0x0 0x40001000 0x0 0x1000>;
reg-shift = <2>;
/* No interrupts for this UART, use console=hvc0 */
/* This clock is the SERIAL_CLK */
clock-frequency = <25000000>;
current-speed = <115200>;
status = "okay";
};
/* The serial for interrupt tests */
uart_testing: serial@40003000 {
compatible = "ns16550";
reg = <0x0 0x40003000 0x0 0x1000>;
interrupts = <1>; /* Output interrupt 1 */ interrupts = <1>; /* Output interrupt 1 */
interrupt-parent = <&PLIC>; interrupt-parent = <&PLIC>;
reg-shift = <2>; reg-shift = <2>;
/* This clock is the SERIAL_CLK */ clock-frequency = <25000000>;
clock-frequency = <50000000>;
current-speed = <115200>; current-speed = <115200>;
status = "okay"; status = "okay";
}; };