From eb7679f6a23500d1bf4619d1af9a31491deb0b72 Mon Sep 17 00:00:00 2001
From: Rodrigo Arias Mallo <rodrigo.arias@bsc.es>
Date: Thu, 4 Jul 2024 17:22:43 +0200
Subject: [PATCH] Prepare device tree to accomodate another UART

---
 ox-plic.dts | 27 ++++++++++++++++++++++++---
 1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/ox-plic.dts b/ox-plic.dts
index 439e34b..139ba51 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -4,6 +4,12 @@
 	#size-cells = <2>; /* 64 bits memory addresses */
 	compatible = "riscv,rv64i";
 	model = "Barcelona Supercomputing Center - Lagarto Ox (NixOS)";
+
+	aliases {
+		serial0 = &uart_console; // ttyS0
+		serial1 = &uart_testing; // ttyS1
+	};
+
 //	chosen {
 //		bootargs = "earlyprintk ignore_loglevel earlycon=sbi console=hvc0 root=/dev/pmem0p1 ro init=/bin/bash";
 //	};
@@ -86,14 +92,29 @@
 		#size-cells = <0x00000002>;
 		compatible = "BSC,Lagarto-ox-soc", "simple-bus";
 		ranges;
-		SERIAL: serial@40001000 {
+
+		/* For bitstream e97dd7b2-397f-11ef-abe0-bbd201a5a630 with two
+		 * consoles */
+
+		/* The serial for the kernel console */
+		uart_console: serial@40001000 {
 			compatible = "ns16550";
 			reg = <0x0 0x40001000 0x0 0x1000>;
+			reg-shift = <2>;
+			/* No interrupts for this UART, use console=hvc0 */
+			/* This clock is the SERIAL_CLK */
+			clock-frequency = <25000000>;
+			current-speed = <115200>;
+			status = "okay";
+		};
+		/* The serial for interrupt tests */
+		uart_testing: serial@40003000 {
+			compatible = "ns16550";
+			reg = <0x0 0x40003000 0x0 0x1000>;
 			interrupts = <1>; /* Output interrupt 1 */
 			interrupt-parent = <&PLIC>;
 			reg-shift = <2>;
-			/* This clock is the SERIAL_CLK */
-			clock-frequency = <50000000>;
+			clock-frequency = <25000000>;
 			current-speed = <115200>;
 			status = "okay";
 		};