Define DT constants in a C header file

Allows writing baremetal programs that can read the correct offsets of
devices or clock frequencies.
This commit is contained in:
Rodrigo Arias 2024-09-05 16:59:06 +02:00
parent 5fdaab9f8f
commit 2f48ad5f40
5 changed files with 54 additions and 14 deletions

2
dts/.gitignore vendored Normal file
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@ -0,0 +1,2 @@
*.pp.dts
*.dtb

17
dts/Makefile Normal file
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@ -0,0 +1,17 @@
CC?=gcc
DTC?=dtc
CPPFLAGS=-E -C -P -nostdinc -undef -x assembler-with-cpp
all: lagarto_ox.dtb
clean:
rm -f *.pp.dts *.dtb
%.pp.dts: %.dts *.h
$(CC) $(CPPFLAGS) $< -o $@
%.dtb: %.pp.dts
dtc -O dtb -o $@ $^
.PRECIOUS: %.pp.dts

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@ -1,3 +1,5 @@
#include "lagarto_ox.h"
/dts-v1/;
/ {
#address-cells = <2>;
@ -19,9 +21,9 @@
// The RTC timer is clocked at the CPU frequency / 1525, so
// around 32786.88 Hz
timebase-frequency = <32786>;
timebase-frequency = <RTC_CLOCK_FREQUENCY>;
CPU0: cpu@0 {
clock-frequency = <50000000>; /* 50 MHz */
clock-frequency = <CPU_CLOCK_FREQUENCY>; /* 50 MHz */
device_type = "cpu";
reg = <0>;
status = "okay";
@ -120,14 +122,14 @@
* consoles */
/* The serial for the kernel console */
uart_console: serial@40001000 {
uart_console: serial@UART0_ADDR_HEX {
compatible = "ns16550";
reg = <0x0 0x40001000 0x0 0x1000>;
reg = <0x0 UART0_ADDR 0x0 0x1000>;
reg-shift = <2>;
/* No interrupts for this UART, use console=hvc0 */
/* This clock is the SERIAL_CLK */
clock-frequency = <50000000>;
current-speed = <115200>;
clock-frequency = <CPU_CLOCK_FREQUENCY>;
current-speed = <UART_SPEED>;
status = "okay";
};
/* The serial for interrupt tests */
@ -138,8 +140,8 @@
/* Output interrupt 1 (the first one) */
interrupts = <1>;
interrupt-parent = <&PLIC>;
clock-frequency = <50000000>;
current-speed = <115200>;
clock-frequency = <CPU_CLOCK_FREQUENCY>;
current-speed = <UART_SPEED>;
status = "okay";
};

9
dts/lagarto_ox.h Normal file
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@ -0,0 +1,9 @@
#define CPU_CLOCK_FREQUENCY 50000000 // 50 MHz
#define RTC_CLOCK_FREQUENCY 32786
#define UART_SPEED 115200
#define UART0_ADDR 0x40001000
#define UART0_ADDR_HEX 40001000
#define PLIC_ADDR 0x40800000
#define UART_ADDR 0x40001000

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@ -370,11 +370,21 @@
# };
#}));
ox-dtb = prev.runCommand "ox.dtb" {
dtsFile = ./ox-plic.dts;
#dtsFile = ./xavi.dts;
ox-dtb = prev.stdenv.mkDerivation rec {
name = "ox.dtb";
src = ./dts;
dontConfigure = true;
nativeBuildInputs = [ prev.buildPackages.dtc ];
} "dtc -O dtb -o $out $dtsFile";
buildPhase = ''
make lagarto_ox.dtb
'';
installPhase = ''
mkdir $out
cp lagarto_ox.* $out
'';
dontFixup = true;
hardeningDisable = [ "all" ];
};
#bitstream = "${final.bitstreams}/lagarto-3-ox/gold.bit";
bitstream = "${final.bitstreams}/lagarto-3-ox/ox_u55c_450d0ff0_fix_delegation_v2.bit";
@ -448,7 +458,7 @@
extraMakeFlags = [
"V=1"
#"KCPPFLAGS=-DLOG_DEBUG"
#"EXT_DTB=${final.ox-dtb}"
#"EXT_DTB=${final.ox-dtb}/lagarto_ox.dtb"
];
};
@ -509,7 +519,7 @@
#"PLATFORM_RISCV_ISA=rv64g" # No compressed instructions
#"PLATFORM_RISCV_ABI=lp64d"
"FW_PAYLOAD_PATH=${final.uboot}/u-boot-nodtb.bin"
"FW_FDT_PATH=${final.ox-dtb}"
"FW_FDT_PATH=${final.ox-dtb}/lagarto_ox.dtb"
# Ensure it doesn't overlap from the 0x80200000 where the kernel will be
# placed.