Add U280 support back in the xocl driver
They removed U280 from the list of supported devices, but that doesn't mean it is will stop working.
This commit is contained in:
parent
0533a48a98
commit
e81b7cc158
@ -7,6 +7,8 @@
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with lib;
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# See: https://iotlab.sdsu.edu/index.php/flash-base-image-on-xilinx-alveo-u280/
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stdenv.mkDerivation rec {
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pname = "xilinx-xocl";
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version = "2.19.0";
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204
m/raccoon/xilinx-xrt-u280-support.patch
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204
m/raccoon/xilinx-xrt-u280-support.patch
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@ -0,0 +1,204 @@
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From 6f64871f2e679ad5d3b140c8a2732edaae2dcf6a Mon Sep 17 00:00:00 2001
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From: Rodrigo Arias Mallo <rodrigo.arias@bsc.es>
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Date: Thu, 20 Feb 2025 18:49:54 +0100
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Subject: [PATCH] Revert "Removed support for u50lv, u55n and u280 platforms in
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XRT (#7901)"
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This reverts commit 41f4221433c6b173316b61cb2e7e3ee5152d8075.
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---
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.../core/pcie/driver/linux/xocl/devices.h | 103 ++++++++++++++++++
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1 file changed, 103 insertions(+)
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diff --git a/src/runtime_src/core/pcie/driver/linux/xocl/devices.h b/src/runtime_src/core/pcie/driver/linux/xocl/devices.h
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index 971ad73d2..5fe329cfa 100644
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--- a/src/runtime_src/core/pcie/driver/linux/xocl/devices.h
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+++ b/src/runtime_src/core/pcie/driver/linux/xocl/devices.h
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@@ -2064,6 +2064,14 @@ struct xocl_subdev_map {
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.subdev_num = ARRAY_SIZE(USER_RES_DSA52), \
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}
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+#define XOCL_BOARD_USER_DSA52_U280 \
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+ (struct xocl_board_private){ \
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+ .flags = 0, \
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+ .subdev_info = USER_RES_DSA52, \
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+ .subdev_num = ARRAY_SIZE(USER_RES_DSA52), \
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+ .p2p_bar_sz = 64, \
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+ }
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+
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#define XOCL_BOARD_USER_SMARTN \
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(struct xocl_board_private){ \
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.flags = XOCL_DSAFLAG_SMARTN, \
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@@ -2370,6 +2378,30 @@ struct xocl_subdev_map {
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.flash_type = FLASH_TYPE_SPI, \
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}
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+
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+#define MGMT_RES_XBB_DSA52_U280 \
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+ ((struct xocl_subdev_info []) { \
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+ XOCL_DEVINFO_FEATURE_ROM, \
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+ XOCL_DEVINFO_PRP_IORES_MGMT, \
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+ XOCL_DEVINFO_AXIGATE_ULP, \
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+ XOCL_DEVINFO_CLOCK_HBM, \
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+ XOCL_DEVINFO_AF_DSA52, \
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+ XOCL_DEVINFO_XMC, \
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+ XOCL_DEVINFO_XVC_PRI, \
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+ XOCL_DEVINFO_MAILBOX_MGMT, \
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+ XOCL_DEVINFO_ICAP_MGMT, \
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+ XOCL_DEVINFO_FMGR, \
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+ XOCL_DEVINFO_FLASH, \
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+ })
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+
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+#define XOCL_BOARD_MGMT_XBB_DSA52_U280 \
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+ (struct xocl_board_private){ \
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+ .flags = 0, \
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+ .subdev_info = MGMT_RES_XBB_DSA52_U280, \
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+ .subdev_num = ARRAY_SIZE(MGMT_RES_XBB_DSA52_U280), \
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+ .flash_type = FLASH_TYPE_SPI, \
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+ }
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+
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#define MGMT_RES_XBB_SMARTN \
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((struct xocl_subdev_info []) { \
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XOCL_DEVINFO_FEATURE_ROM_SMARTN, \
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@@ -2772,6 +2804,24 @@ struct xocl_subdev_map {
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.board_name = "u50" \
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}
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+#define XOCL_BOARD_U55N_USER_RAPTOR2 \
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+ (struct xocl_board_private){ \
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+ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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+ .board_name = "u55n", \
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+ .subdev_info = RES_USER_VSEC, \
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+ .subdev_num = ARRAY_SIZE(RES_USER_VSEC), \
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+ }
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+
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+#define XOCL_BOARD_U55N_MGMT_RAPTOR2 \
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+ (struct xocl_board_private){ \
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+ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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+ .subdev_info = RES_MGMT_VSEC, \
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+ .subdev_num = ARRAY_SIZE(RES_MGMT_VSEC), \
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+ .flash_type = FLASH_TYPE_SPI, \
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+ .board_name = "u55n", \
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+ .vbnv = "xilinx_u55n" \
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+ }
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+
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#define XOCL_BOARD_U55C_USER_RAPTOR2 \
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(struct xocl_board_private){ \
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.flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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@@ -2790,6 +2840,24 @@ struct xocl_subdev_map {
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.vbnv = "xilinx_u55c" \
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}
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+#define XOCL_BOARD_U50LV_USER_RAPTOR2 \
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+ (struct xocl_board_private){ \
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+ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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+ .board_name = "u50lv", \
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+ .subdev_info = RES_USER_VSEC, \
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+ .subdev_num = ARRAY_SIZE(RES_USER_VSEC), \
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+ }
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+
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+#define XOCL_BOARD_U50LV_MGMT_RAPTOR2 \
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+ (struct xocl_board_private){ \
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+ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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+ .subdev_info = RES_MGMT_VSEC, \
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+ .subdev_num = ARRAY_SIZE(RES_MGMT_VSEC), \
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+ .flash_type = FLASH_TYPE_SPI, \
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+ .board_name = "u50lv", \
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+ .vbnv = "xilinx_u50lv" \
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+ }
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+
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#define XOCL_BOARD_U50C_USER_RAPTOR2 \
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(struct xocl_board_private){ \
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.flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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@@ -2834,6 +2902,14 @@ struct xocl_subdev_map {
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.p2p_bar_sz = 64, \
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}
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+#define XOCL_BOARD_U280_USER_RAPTOR2 \
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+ (struct xocl_board_private){ \
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+ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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+ .subdev_info = RES_USER_VSEC, \
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+ .subdev_num = ARRAY_SIZE(RES_USER_VSEC), \
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+ .board_name = "u280", \
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+ }
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+
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#define XOCL_BOARD_U250_MGMT_RAPTOR2 \
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(struct xocl_board_private){ \
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.flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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@@ -2843,6 +2919,15 @@ struct xocl_subdev_map {
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.board_name = "u250" \
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}
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+#define XOCL_BOARD_U280_MGMT_RAPTOR2 \
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+ (struct xocl_board_private){ \
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+ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \
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+ .subdev_info = RES_MGMT_VSEC, \
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+ .subdev_num = ARRAY_SIZE(RES_MGMT_VSEC), \
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+ .flash_type = FLASH_TYPE_SPI, \
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+ .board_name = "u280" \
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+ }
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+
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#define XOCL_BOARD_VERSAL_USER_RAPTOR2 \
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(struct xocl_board_private){ \
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.flags = XOCL_DSAFLAG_DYNAMIC_IP | \
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@@ -3435,6 +3520,8 @@ struct xocl_subdev_map {
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{ XOCL_PCI_DEVID(0x10EE, 0x6A8F, 0x4353, MGMT_6A8F_DSA52) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5000, PCI_ANY_ID, MGMT_XBB_DSA52_U200) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5004, PCI_ANY_ID, MGMT_XBB_DSA52) }, \
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+ { XOCL_PCI_DEVID(0x10EE, 0x5008, PCI_ANY_ID, MGMT_XBB_DSA52_U280) },\
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+ { XOCL_PCI_DEVID(0x10EE, 0x500C, PCI_ANY_ID, MGMT_XBB_DSA52_U280) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x5020, PCI_ANY_ID, MGMT_U50) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5028, PCI_ANY_ID, MGMT_VERSAL) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5044, PCI_ANY_ID, MGMT_VERSAL) }, \
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@@ -3448,7 +3535,9 @@ struct xocl_subdev_map {
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{ XOCL_PCI_DEVID(0x10EE, 0x5078, PCI_ANY_ID, VERSAL_MGMT_RAPTOR2) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5050, PCI_ANY_ID, MGMT_U25) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x504E, PCI_ANY_ID, U26Z_MGMT_RAPTOR2) }, \
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+ { XOCL_PCI_DEVID(0x10EE, 0x5058, PCI_ANY_ID, U55N_MGMT_RAPTOR2) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x505C, PCI_ANY_ID, U55C_MGMT_RAPTOR2) },\
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+ { XOCL_PCI_DEVID(0x10EE, 0x5060, PCI_ANY_ID, U50LV_MGMT_RAPTOR2) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x506C, PCI_ANY_ID, U50C_MGMT_RAPTOR2) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x5074, PCI_ANY_ID, X3522PV_MGMT_RAPTOR2) }, \
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{ XOCL_PCI_DEVID(0x13FE, 0x006C, PCI_ANY_ID, MGMT_6A8F) }, \
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@@ -3457,6 +3546,8 @@ struct xocl_subdev_map {
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{ XOCL_PCI_DEVID(0x10EE, 0xF987, PCI_ANY_ID, XBB_MFG("samsung_efuse")) },\
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{ XOCL_PCI_DEVID(0x10EE, 0xD000, PCI_ANY_ID, XBB_MFG("u200")) },\
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{ XOCL_PCI_DEVID(0x10EE, 0xD004, PCI_ANY_ID, XBB_MFG("u250")) },\
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+ { XOCL_PCI_DEVID(0x10EE, 0xD008, PCI_ANY_ID, XBB_MFG("u280-es1")) }, \
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+ { XOCL_PCI_DEVID(0x10EE, 0xD00C, PCI_ANY_ID, XBB_MFG("u280")) },\
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{ XOCL_PCI_DEVID(0x10EE, 0xD030, PCI_ANY_ID, XBB_MFG("poc1465")) },\
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{ XOCL_PCI_DEVID(0x10EE, 0xD020, PCI_ANY_ID, XBB_MFG_U50) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0xD03C, PCI_ANY_ID, XBB_MFG_U30) }, \
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@@ -3495,11 +3586,15 @@ struct xocl_subdev_map {
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{ XOCL_PCI_DEVID(0x10EE, 0x7990, 0x4352, USER_DSA52) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5001, PCI_ANY_ID, USER_DSA52) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5005, PCI_ANY_ID, USER_DSA52) }, \
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+ { XOCL_PCI_DEVID(0x10EE, 0x5009, PCI_ANY_ID, USER_DSA52_U280) }, \
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+ { XOCL_PCI_DEVID(0x10EE, 0x500D, PCI_ANY_ID, USER_DSA52_U280) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5021, PCI_ANY_ID, USER_U50) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x5051, PCI_ANY_ID, USER_U25) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x504F, PCI_ANY_ID, U26Z_USER_RAPTOR2) }, \
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{ XOCL_PCI_DEVID(0x10EE, 0x513D, PCI_ANY_ID, U30_USER_RAPTOR2) }, \
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+ { XOCL_PCI_DEVID(0x10EE, 0x5059, PCI_ANY_ID, U55N_USER_RAPTOR2) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x505D, PCI_ANY_ID, U55C_USER_RAPTOR2) },\
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+ { XOCL_PCI_DEVID(0x10EE, 0x5061, PCI_ANY_ID, U50LV_USER_RAPTOR2) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x506D, PCI_ANY_ID, U50C_USER_RAPTOR2) },\
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{ XOCL_PCI_DEVID(0x10EE, 0x5075, PCI_ANY_ID, X3522PV_USER_RAPTOR2) }, \
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{ XOCL_PCI_DEVID(0x13FE, 0x0065, PCI_ANY_ID, USER_XDMA) }, \
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@@ -3561,6 +3656,14 @@ struct xocl_subdev_map {
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.vbnv = "xilinx_u250", \
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.priv_data = &XOCL_BOARD_U250_MGMT_RAPTOR2, \
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.type = XOCL_DSAMAP_RAPTOR2 }, \
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+ { 0x10EE, 0x500D, PCI_ANY_ID, \
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+ .vbnv = "xilinx_u280", \
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+ .priv_data = &XOCL_BOARD_U280_USER_RAPTOR2, \
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+ .type = XOCL_DSAMAP_RAPTOR2 }, \
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+ { 0x10EE, 0x500C, PCI_ANY_ID, \
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+ .vbnv = "xilinx_u280", \
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+ .priv_data = &XOCL_BOARD_U280_MGMT_RAPTOR2, \
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+ .type = XOCL_DSAMAP_RAPTOR2 }, \
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{ 0x10EE, 0x5020, PCI_ANY_ID, \
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.vbnv = "xilinx_u50", \
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.priv_data = &XOCL_BOARD_U50_MGMT_RAPTOR2, \
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--
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2.45.2
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@ -39,6 +39,7 @@ stdenv.mkDerivation rec {
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patches = [
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./xilinx-xrt-aiebu.patch
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./xilinx-xrt-icd.patch
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./xilinx-xrt-u280-support.patch
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];
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cmakeFlags = [
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"-DXRT_INSTALL_PREFIX=${placeholder "out"}"
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