From e81b7cc158ff40c62d38eecf54029aa8ab759fe5 Mon Sep 17 00:00:00 2001 From: Rodrigo Arias Mallo Date: Fri, 21 Feb 2025 10:29:04 +0100 Subject: [PATCH] Add U280 support back in the xocl driver They removed U280 from the list of supported devices, but that doesn't mean it is will stop working. --- m/raccoon/xilinx-xocl.nix | 2 + m/raccoon/xilinx-xrt-u280-support.patch | 204 ++++++++++++++++++++++++ m/raccoon/xilinx-xrt.nix | 1 + 3 files changed, 207 insertions(+) create mode 100644 m/raccoon/xilinx-xrt-u280-support.patch diff --git a/m/raccoon/xilinx-xocl.nix b/m/raccoon/xilinx-xocl.nix index 67300fc..6a38e2b 100644 --- a/m/raccoon/xilinx-xocl.nix +++ b/m/raccoon/xilinx-xocl.nix @@ -7,6 +7,8 @@ with lib; +# See: https://iotlab.sdsu.edu/index.php/flash-base-image-on-xilinx-alveo-u280/ + stdenv.mkDerivation rec { pname = "xilinx-xocl"; version = "2.19.0"; diff --git a/m/raccoon/xilinx-xrt-u280-support.patch b/m/raccoon/xilinx-xrt-u280-support.patch new file mode 100644 index 0000000..1280aba --- /dev/null +++ b/m/raccoon/xilinx-xrt-u280-support.patch @@ -0,0 +1,204 @@ +From 6f64871f2e679ad5d3b140c8a2732edaae2dcf6a Mon Sep 17 00:00:00 2001 +From: Rodrigo Arias Mallo +Date: Thu, 20 Feb 2025 18:49:54 +0100 +Subject: [PATCH] Revert "Removed support for u50lv, u55n and u280 platforms in + XRT (#7901)" + +This reverts commit 41f4221433c6b173316b61cb2e7e3ee5152d8075. +--- + .../core/pcie/driver/linux/xocl/devices.h | 103 ++++++++++++++++++ + 1 file changed, 103 insertions(+) + +diff --git a/src/runtime_src/core/pcie/driver/linux/xocl/devices.h b/src/runtime_src/core/pcie/driver/linux/xocl/devices.h +index 971ad73d2..5fe329cfa 100644 +--- a/src/runtime_src/core/pcie/driver/linux/xocl/devices.h ++++ b/src/runtime_src/core/pcie/driver/linux/xocl/devices.h +@@ -2064,6 +2064,14 @@ struct xocl_subdev_map { + .subdev_num = ARRAY_SIZE(USER_RES_DSA52), \ + } + ++#define XOCL_BOARD_USER_DSA52_U280 \ ++ (struct xocl_board_private){ \ ++ .flags = 0, \ ++ .subdev_info = USER_RES_DSA52, \ ++ .subdev_num = ARRAY_SIZE(USER_RES_DSA52), \ ++ .p2p_bar_sz = 64, \ ++ } ++ + #define XOCL_BOARD_USER_SMARTN \ + (struct xocl_board_private){ \ + .flags = XOCL_DSAFLAG_SMARTN, \ +@@ -2370,6 +2378,30 @@ struct xocl_subdev_map { + .flash_type = FLASH_TYPE_SPI, \ + } + ++ ++#define MGMT_RES_XBB_DSA52_U280 \ ++ ((struct xocl_subdev_info []) { \ ++ XOCL_DEVINFO_FEATURE_ROM, \ ++ XOCL_DEVINFO_PRP_IORES_MGMT, \ ++ XOCL_DEVINFO_AXIGATE_ULP, \ ++ XOCL_DEVINFO_CLOCK_HBM, \ ++ XOCL_DEVINFO_AF_DSA52, \ ++ XOCL_DEVINFO_XMC, \ ++ XOCL_DEVINFO_XVC_PRI, \ ++ XOCL_DEVINFO_MAILBOX_MGMT, \ ++ XOCL_DEVINFO_ICAP_MGMT, \ ++ XOCL_DEVINFO_FMGR, \ ++ XOCL_DEVINFO_FLASH, \ ++ }) ++ ++#define XOCL_BOARD_MGMT_XBB_DSA52_U280 \ ++ (struct xocl_board_private){ \ ++ .flags = 0, \ ++ .subdev_info = MGMT_RES_XBB_DSA52_U280, \ ++ .subdev_num = ARRAY_SIZE(MGMT_RES_XBB_DSA52_U280), \ ++ .flash_type = FLASH_TYPE_SPI, \ ++ } ++ + #define MGMT_RES_XBB_SMARTN \ + ((struct xocl_subdev_info []) { \ + XOCL_DEVINFO_FEATURE_ROM_SMARTN, \ +@@ -2772,6 +2804,24 @@ struct xocl_subdev_map { + .board_name = "u50" \ + } + ++#define XOCL_BOARD_U55N_USER_RAPTOR2 \ ++ (struct xocl_board_private){ \ ++ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ ++ .board_name = "u55n", \ ++ .subdev_info = RES_USER_VSEC, \ ++ .subdev_num = ARRAY_SIZE(RES_USER_VSEC), \ ++ } ++ ++#define XOCL_BOARD_U55N_MGMT_RAPTOR2 \ ++ (struct xocl_board_private){ \ ++ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ ++ .subdev_info = RES_MGMT_VSEC, \ ++ .subdev_num = ARRAY_SIZE(RES_MGMT_VSEC), \ ++ .flash_type = FLASH_TYPE_SPI, \ ++ .board_name = "u55n", \ ++ .vbnv = "xilinx_u55n" \ ++ } ++ + #define XOCL_BOARD_U55C_USER_RAPTOR2 \ + (struct xocl_board_private){ \ + .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ +@@ -2790,6 +2840,24 @@ struct xocl_subdev_map { + .vbnv = "xilinx_u55c" \ + } + ++#define XOCL_BOARD_U50LV_USER_RAPTOR2 \ ++ (struct xocl_board_private){ \ ++ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ ++ .board_name = "u50lv", \ ++ .subdev_info = RES_USER_VSEC, \ ++ .subdev_num = ARRAY_SIZE(RES_USER_VSEC), \ ++ } ++ ++#define XOCL_BOARD_U50LV_MGMT_RAPTOR2 \ ++ (struct xocl_board_private){ \ ++ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ ++ .subdev_info = RES_MGMT_VSEC, \ ++ .subdev_num = ARRAY_SIZE(RES_MGMT_VSEC), \ ++ .flash_type = FLASH_TYPE_SPI, \ ++ .board_name = "u50lv", \ ++ .vbnv = "xilinx_u50lv" \ ++ } ++ + #define XOCL_BOARD_U50C_USER_RAPTOR2 \ + (struct xocl_board_private){ \ + .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ +@@ -2834,6 +2902,14 @@ struct xocl_subdev_map { + .p2p_bar_sz = 64, \ + } + ++#define XOCL_BOARD_U280_USER_RAPTOR2 \ ++ (struct xocl_board_private){ \ ++ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ ++ .subdev_info = RES_USER_VSEC, \ ++ .subdev_num = ARRAY_SIZE(RES_USER_VSEC), \ ++ .board_name = "u280", \ ++ } ++ + #define XOCL_BOARD_U250_MGMT_RAPTOR2 \ + (struct xocl_board_private){ \ + .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ +@@ -2843,6 +2919,15 @@ struct xocl_subdev_map { + .board_name = "u250" \ + } + ++#define XOCL_BOARD_U280_MGMT_RAPTOR2 \ ++ (struct xocl_board_private){ \ ++ .flags = XOCL_DSAFLAG_DYNAMIC_IP, \ ++ .subdev_info = RES_MGMT_VSEC, \ ++ .subdev_num = ARRAY_SIZE(RES_MGMT_VSEC), \ ++ .flash_type = FLASH_TYPE_SPI, \ ++ .board_name = "u280" \ ++ } ++ + #define XOCL_BOARD_VERSAL_USER_RAPTOR2 \ + (struct xocl_board_private){ \ + .flags = XOCL_DSAFLAG_DYNAMIC_IP | \ +@@ -3435,6 +3520,8 @@ struct xocl_subdev_map { + { XOCL_PCI_DEVID(0x10EE, 0x6A8F, 0x4353, MGMT_6A8F_DSA52) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5000, PCI_ANY_ID, MGMT_XBB_DSA52_U200) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5004, PCI_ANY_ID, MGMT_XBB_DSA52) }, \ ++ { XOCL_PCI_DEVID(0x10EE, 0x5008, PCI_ANY_ID, MGMT_XBB_DSA52_U280) },\ ++ { XOCL_PCI_DEVID(0x10EE, 0x500C, PCI_ANY_ID, MGMT_XBB_DSA52_U280) },\ + { XOCL_PCI_DEVID(0x10EE, 0x5020, PCI_ANY_ID, MGMT_U50) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5028, PCI_ANY_ID, MGMT_VERSAL) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5044, PCI_ANY_ID, MGMT_VERSAL) }, \ +@@ -3448,7 +3535,9 @@ struct xocl_subdev_map { + { XOCL_PCI_DEVID(0x10EE, 0x5078, PCI_ANY_ID, VERSAL_MGMT_RAPTOR2) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5050, PCI_ANY_ID, MGMT_U25) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x504E, PCI_ANY_ID, U26Z_MGMT_RAPTOR2) }, \ ++ { XOCL_PCI_DEVID(0x10EE, 0x5058, PCI_ANY_ID, U55N_MGMT_RAPTOR2) },\ + { XOCL_PCI_DEVID(0x10EE, 0x505C, PCI_ANY_ID, U55C_MGMT_RAPTOR2) },\ ++ { XOCL_PCI_DEVID(0x10EE, 0x5060, PCI_ANY_ID, U50LV_MGMT_RAPTOR2) },\ + { XOCL_PCI_DEVID(0x10EE, 0x506C, PCI_ANY_ID, U50C_MGMT_RAPTOR2) },\ + { XOCL_PCI_DEVID(0x10EE, 0x5074, PCI_ANY_ID, X3522PV_MGMT_RAPTOR2) }, \ + { XOCL_PCI_DEVID(0x13FE, 0x006C, PCI_ANY_ID, MGMT_6A8F) }, \ +@@ -3457,6 +3546,8 @@ struct xocl_subdev_map { + { XOCL_PCI_DEVID(0x10EE, 0xF987, PCI_ANY_ID, XBB_MFG("samsung_efuse")) },\ + { XOCL_PCI_DEVID(0x10EE, 0xD000, PCI_ANY_ID, XBB_MFG("u200")) },\ + { XOCL_PCI_DEVID(0x10EE, 0xD004, PCI_ANY_ID, XBB_MFG("u250")) },\ ++ { XOCL_PCI_DEVID(0x10EE, 0xD008, PCI_ANY_ID, XBB_MFG("u280-es1")) }, \ ++ { XOCL_PCI_DEVID(0x10EE, 0xD00C, PCI_ANY_ID, XBB_MFG("u280")) },\ + { XOCL_PCI_DEVID(0x10EE, 0xD030, PCI_ANY_ID, XBB_MFG("poc1465")) },\ + { XOCL_PCI_DEVID(0x10EE, 0xD020, PCI_ANY_ID, XBB_MFG_U50) }, \ + { XOCL_PCI_DEVID(0x10EE, 0xD03C, PCI_ANY_ID, XBB_MFG_U30) }, \ +@@ -3495,11 +3586,15 @@ struct xocl_subdev_map { + { XOCL_PCI_DEVID(0x10EE, 0x7990, 0x4352, USER_DSA52) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5001, PCI_ANY_ID, USER_DSA52) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5005, PCI_ANY_ID, USER_DSA52) }, \ ++ { XOCL_PCI_DEVID(0x10EE, 0x5009, PCI_ANY_ID, USER_DSA52_U280) }, \ ++ { XOCL_PCI_DEVID(0x10EE, 0x500D, PCI_ANY_ID, USER_DSA52_U280) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5021, PCI_ANY_ID, USER_U50) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x5051, PCI_ANY_ID, USER_U25) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x504F, PCI_ANY_ID, U26Z_USER_RAPTOR2) }, \ + { XOCL_PCI_DEVID(0x10EE, 0x513D, PCI_ANY_ID, U30_USER_RAPTOR2) }, \ ++ { XOCL_PCI_DEVID(0x10EE, 0x5059, PCI_ANY_ID, U55N_USER_RAPTOR2) },\ + { XOCL_PCI_DEVID(0x10EE, 0x505D, PCI_ANY_ID, U55C_USER_RAPTOR2) },\ ++ { XOCL_PCI_DEVID(0x10EE, 0x5061, PCI_ANY_ID, U50LV_USER_RAPTOR2) },\ + { XOCL_PCI_DEVID(0x10EE, 0x506D, PCI_ANY_ID, U50C_USER_RAPTOR2) },\ + { XOCL_PCI_DEVID(0x10EE, 0x5075, PCI_ANY_ID, X3522PV_USER_RAPTOR2) }, \ + { XOCL_PCI_DEVID(0x13FE, 0x0065, PCI_ANY_ID, USER_XDMA) }, \ +@@ -3561,6 +3656,14 @@ struct xocl_subdev_map { + .vbnv = "xilinx_u250", \ + .priv_data = &XOCL_BOARD_U250_MGMT_RAPTOR2, \ + .type = XOCL_DSAMAP_RAPTOR2 }, \ ++ { 0x10EE, 0x500D, PCI_ANY_ID, \ ++ .vbnv = "xilinx_u280", \ ++ .priv_data = &XOCL_BOARD_U280_USER_RAPTOR2, \ ++ .type = XOCL_DSAMAP_RAPTOR2 }, \ ++ { 0x10EE, 0x500C, PCI_ANY_ID, \ ++ .vbnv = "xilinx_u280", \ ++ .priv_data = &XOCL_BOARD_U280_MGMT_RAPTOR2, \ ++ .type = XOCL_DSAMAP_RAPTOR2 }, \ + { 0x10EE, 0x5020, PCI_ANY_ID, \ + .vbnv = "xilinx_u50", \ + .priv_data = &XOCL_BOARD_U50_MGMT_RAPTOR2, \ +-- +2.45.2 + diff --git a/m/raccoon/xilinx-xrt.nix b/m/raccoon/xilinx-xrt.nix index 532b392..199bc4e 100644 --- a/m/raccoon/xilinx-xrt.nix +++ b/m/raccoon/xilinx-xrt.nix @@ -39,6 +39,7 @@ stdenv.mkDerivation rec { patches = [ ./xilinx-xrt-aiebu.patch ./xilinx-xrt-icd.patch + ./xilinx-xrt-u280-support.patch ]; cmakeFlags = [ "-DXRT_INSTALL_PREFIX=${placeholder "out"}"