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Document memory layout

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This commit is contained in:
Rodrigo Arias 2024-06-28 10:39:10 +02:00
parent a8f3234031
commit fc4b8126f6
2 changed files with 10 additions and 1 deletions
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2
lagarto-ox.nix
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@ -97,7 +97,7 @@
version = "2023.07.02-print-cpu-probe"; version = "2023.07.02-print-cpu-probe";
src = builtins.fetchGit { src = builtins.fetchGit {
url = "file:///home/Computational/rarias/riscv/u-boot"; url = "file:///home/Computational/rarias/riscv/u-boot";
rev = "6fb984f14607c53878ba0ed82425d77e396b727b"; rev = "f80a22a480f0e4157647bacf90e663be457c72c4";
}; };
#patches = [ ./u-boot-debug.patch ]; #patches = [ ./u-boot-debug.patch ];
# #

9
ox-plic.dts
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@ -29,6 +29,15 @@
}; };
}; };
}; };
/* Memory layout:
*
* [0x0_6000_0000, 0x0_7000_0000) -> DMA pool (256 MiB)
* [0x0_7000_0000, 0x0_8000_0000) -> DMA pool (256 MiB)
* [0x0_8000_0000, 0x0_f7e0_0000) -> RAM memory (~1.8 GiB)
* [0x0_f7e0_0000, 0x1_b7f0_0000) -> PMEM3 (3 GiB)
* [0x1_b7f0_0000, 0x1_bff0_0000) -> PMEM2 (128 MiB)
* [0x1_bff0_0000, 0x2_8000_0000) -> PMEM (3 GiB)
*/
memory@80000000 { memory@80000000 {
device_type = "memory"; device_type = "memory";
reg = <0x00000000 0x80000000 0x00000000 0x77e00000>; reg = <0x00000000 0x80000000 0x00000000 0x77e00000>;