From fc4b8126f66ef8d9422cfb9a3623f8a7ff4afaf3 Mon Sep 17 00:00:00 2001
From: Rodrigo Arias Mallo <rodrigo.arias@bsc.es>
Date: Fri, 28 Jun 2024 10:39:10 +0200
Subject: [PATCH] Document memory layout

---
 lagarto-ox.nix | 2 +-
 ox-plic.dts    | 9 +++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/lagarto-ox.nix b/lagarto-ox.nix
index 92355ec..27f06c9 100644
--- a/lagarto-ox.nix
+++ b/lagarto-ox.nix
@@ -97,7 +97,7 @@
       version = "2023.07.02-print-cpu-probe";
       src = builtins.fetchGit {
         url = "file:///home/Computational/rarias/riscv/u-boot";
-        rev = "6fb984f14607c53878ba0ed82425d77e396b727b";
+        rev = "f80a22a480f0e4157647bacf90e663be457c72c4";
       };
       #patches = [ ./u-boot-debug.patch ];
       #
diff --git a/ox-plic.dts b/ox-plic.dts
index 3611dc4..43cbfcc 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -29,6 +29,15 @@
 			};
 		};
 	};
+	/* Memory layout:
+	 *
+	 * [0x0_6000_0000, 0x0_7000_0000) -> DMA pool (256 MiB)
+	 * [0x0_7000_0000, 0x0_8000_0000) -> DMA pool (256 MiB)
+	 * [0x0_8000_0000, 0x0_f7e0_0000) -> RAM memory (~1.8 GiB)
+	 * [0x0_f7e0_0000, 0x1_b7f0_0000) -> PMEM3 (3 GiB)
+	 * [0x1_b7f0_0000, 0x1_bff0_0000) -> PMEM2 (128 MiB)
+	 * [0x1_bff0_0000, 0x2_8000_0000) -> PMEM (3 GiB)
+	 */
 	memory@80000000 {
 		device_type = "memory";
 		reg = <0x00000000 0x80000000 0x00000000 0x77e00000>;