Don't enable machine interrupt
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@ -1,5 +1,5 @@
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diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
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index 0ae604a..fc0c286 100644
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index 0ae604a..11656e0 100644
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--- a/lib/sbi/sbi_irqchip.c
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+++ b/lib/sbi/sbi_irqchip.c
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@@ -9,6 +9,9 @@
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@ -140,21 +140,21 @@ index 0ae604a..fc0c286 100644
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+
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+ sbi_printf("Timer enabled in PLIC\n");
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+
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+ sbi_printf("%sMIE%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_MIE));
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+ sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_MSTATUS));
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+
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+ /* Enable external timer interrupts */
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+ csr_set(CSR_MIE, MIE_MEIE); /* Needed? */
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+ csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */
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+
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+ sbi_printf("External timer interrupts enabled in machine mode\n");
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+
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+ sbi_printf("%sMIE%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_MIE));
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+ sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_MSTATUS));
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+// sbi_printf("%sMIE%s: 0x%" PRILX "\n",
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+// prefix, suffix, csr_read(CSR_MIE));
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+// sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n",
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+// prefix, suffix, csr_read(CSR_MSTATUS));
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+//
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+// /* Enable external timer interrupts */
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+// csr_set(CSR_MIE, MIE_MEIE); /* Needed? */
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+// csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */
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+//
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+// sbi_printf("External timer interrupts enabled in machine mode\n");
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+//
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+// sbi_printf("%sMIE%s: 0x%" PRILX "\n",
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+// prefix, suffix, csr_read(CSR_MIE));
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+// sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n",
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+// prefix, suffix, csr_read(CSR_MSTATUS));
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+
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+ /* Enable timer interrupt */
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+ *mtimecmp = *mtime + 10000;
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