From 1faef5b452c2dd7efc2e0fad5945ab67818ff8b6 Mon Sep 17 00:00:00 2001 From: Rodrigo Arias Mallo Date: Wed, 21 Aug 2024 09:29:22 +0200 Subject: [PATCH] Don't enable machine interrupt --- opensbi-test-plic.patch | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/opensbi-test-plic.patch b/opensbi-test-plic.patch index 49c2950..c263014 100644 --- a/opensbi-test-plic.patch +++ b/opensbi-test-plic.patch @@ -1,5 +1,5 @@ diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c -index 0ae604a..fc0c286 100644 +index 0ae604a..11656e0 100644 --- a/lib/sbi/sbi_irqchip.c +++ b/lib/sbi/sbi_irqchip.c @@ -9,6 +9,9 @@ @@ -140,21 +140,21 @@ index 0ae604a..fc0c286 100644 + + sbi_printf("Timer enabled in PLIC\n"); + -+ sbi_printf("%sMIE%s: 0x%" PRILX "\n", -+ prefix, suffix, csr_read(CSR_MIE)); -+ sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n", -+ prefix, suffix, csr_read(CSR_MSTATUS)); -+ -+ /* Enable external timer interrupts */ -+ csr_set(CSR_MIE, MIE_MEIE); /* Needed? */ -+ csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */ -+ -+ sbi_printf("External timer interrupts enabled in machine mode\n"); -+ -+ sbi_printf("%sMIE%s: 0x%" PRILX "\n", -+ prefix, suffix, csr_read(CSR_MIE)); -+ sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n", -+ prefix, suffix, csr_read(CSR_MSTATUS)); ++// sbi_printf("%sMIE%s: 0x%" PRILX "\n", ++// prefix, suffix, csr_read(CSR_MIE)); ++// sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n", ++// prefix, suffix, csr_read(CSR_MSTATUS)); ++// ++// /* Enable external timer interrupts */ ++// csr_set(CSR_MIE, MIE_MEIE); /* Needed? */ ++// csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */ ++// ++// sbi_printf("External timer interrupts enabled in machine mode\n"); ++// ++// sbi_printf("%sMIE%s: 0x%" PRILX "\n", ++// prefix, suffix, csr_read(CSR_MIE)); ++// sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n", ++// prefix, suffix, csr_read(CSR_MSTATUS)); + + /* Enable timer interrupt */ + *mtimecmp = *mtime + 10000;