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Don't enable machine interrupt

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This commit is contained in:
Rodrigo Arias Mallo 2024-08-21 09:29:22 +02:00
parent b7287bd4df
commit 1faef5b452
1 changed files with 16 additions and 16 deletions
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32
opensbi-test-plic.patch
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@ -1,5 +1,5 @@
diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
index 0ae604a..fc0c286 100644 index 0ae604a..11656e0 100644
--- a/lib/sbi/sbi_irqchip.c --- a/lib/sbi/sbi_irqchip.c
+++ b/lib/sbi/sbi_irqchip.c +++ b/lib/sbi/sbi_irqchip.c
@@ -9,6 +9,9 @@ @@ -9,6 +9,9 @@
@ -140,21 +140,21 @@ index 0ae604a..fc0c286 100644
+ +
+ sbi_printf("Timer enabled in PLIC\n"); + sbi_printf("Timer enabled in PLIC\n");
+ +
+ sbi_printf("%sMIE%s: 0x%" PRILX "\n", +// sbi_printf("%sMIE%s: 0x%" PRILX "\n",
+ prefix, suffix, csr_read(CSR_MIE)); +// prefix, suffix, csr_read(CSR_MIE));
+ sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n", +// sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n",
+ prefix, suffix, csr_read(CSR_MSTATUS)); +// prefix, suffix, csr_read(CSR_MSTATUS));
+ +//
+ /* Enable external timer interrupts */ +// /* Enable external timer interrupts */
+ csr_set(CSR_MIE, MIE_MEIE); /* Needed? */ +// csr_set(CSR_MIE, MIE_MEIE); /* Needed? */
+ csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */ +// csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */
+ +//
+ sbi_printf("External timer interrupts enabled in machine mode\n"); +// sbi_printf("External timer interrupts enabled in machine mode\n");
+ +//
+ sbi_printf("%sMIE%s: 0x%" PRILX "\n", +// sbi_printf("%sMIE%s: 0x%" PRILX "\n",
+ prefix, suffix, csr_read(CSR_MIE)); +// prefix, suffix, csr_read(CSR_MIE));
+ sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n", +// sbi_printf("%sMSTATUS%s: 0x%" PRILX "\n",
+ prefix, suffix, csr_read(CSR_MSTATUS)); +// prefix, suffix, csr_read(CSR_MSTATUS));
+ +
+ /* Enable timer interrupt */ + /* Enable timer interrupt */
+ *mtimecmp = *mtime + 10000; + *mtimecmp = *mtime + 10000;