rarias/nixos-riscv
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Remap interrupts to avoid 0 and duplicates

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Let see if we can guess which is the correct number for the interrupts.
The plic should appear in the IRQ list but currently it doesn't.
This commit is contained in:
Rodrigo Arias 2024-07-03 18:41:52 +02:00
parent 30703d1715
commit 0c4311e15c
1 changed files with 4 additions and 3 deletions
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7
ox-plic.dts
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@ -89,9 +89,10 @@
SERIAL: serial@40001000 {
compatible = "ns16550";
reg = <0x0 0x40001000 0x0 0x100>;
interrupts = <0>; /* Output interrupt 0 */
interrupts = <1>; /* Output interrupt 1 */
interrupt-parent = <&PLIC>;
reg-shift = <2>;
/* This clock is the SERIAL_CLK */
clock-frequency = <50000000>;
current-speed = <115200>;
status = "okay";
@ -146,7 +147,7 @@
interrupt-controller; /* Receives interrupts */
#interrupt-cells = <1>;
/* Sends interrupts to HART interrupt controllers */
interrupts-extended = <&HLIC0 3 &HLIC0 7>;
interrupts-extended = <&HLIC0 2>;
reg = < 0x0 0x40800000 0x0 0x00400000>;
riscv,ndev = <0x3>;
riscv,max-priority = <0x7>;
@ -173,7 +174,7 @@
/* Guesswork: There must be a timer at 0x40170000 as it is
* initialized in OpenSBI. It seems to drive the console. */
//axi_timer: timer@40170000 {
//SERIAL_CLK: timer@40170000 {
// clock-frequency = <100000000>;
// clocks = <&clk_bus_0>;
// compatible = "xlnx,xps-timer-1.00.a";