Revert UART speed to 50MHz following vivado log
> UART Name g_UART IntfLabel m_axi_uart SyncClk {Label CLK0 Freq 50000000 > Name clk_i} BaseAddr 0x0 Number 2 AxiAddrWidth 0 AxiDataWidth 0 AxiIdWidth > 0 AxiUserWidth 0 Mode normal IRQ uart_irq
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7eeb16ecfb
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05898c5f85
@ -55,7 +55,7 @@ index 0000000..a359b34
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+
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+
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+#define OX_ALVEO_UART_BASE_ADDR 0x40000000
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+#define OX_ALVEO_UART_BASE_ADDR 0x40000000
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+#define OX_ALVEO_UART_OFFSET 0x1000
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+#define OX_ALVEO_UART_OFFSET 0x1000
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+#define OX_ALVEO_UART_INPUT_FREQ 25000000
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+#define OX_ALVEO_UART_INPUT_FREQ 50000000
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+#define OX_ALVEO_UART_BAUDRATE 115200
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+#define OX_ALVEO_UART_BAUDRATE 115200
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+#define OX_ALVEO_PLIC_ADDR 0x40800000
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+#define OX_ALVEO_PLIC_ADDR 0x40800000
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+#define OX_ALVEO_PLIC_NUM_SOURCES 3
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+#define OX_ALVEO_PLIC_NUM_SOURCES 3
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@ -103,7 +103,7 @@
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reg-shift = <2>;
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reg-shift = <2>;
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/* No interrupts for this UART, use console=hvc0 */
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/* No interrupts for this UART, use console=hvc0 */
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/* This clock is the SERIAL_CLK */
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/* This clock is the SERIAL_CLK */
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clock-frequency = <25000000>;
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clock-frequency = <50000000>;
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current-speed = <115200>;
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current-speed = <115200>;
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status = "okay";
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status = "okay";
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};
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};
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@ -114,7 +114,7 @@
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interrupts = <1>; /* Output interrupt 1 */
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interrupts = <1>; /* Output interrupt 1 */
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interrupt-parent = <&PLIC>;
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interrupt-parent = <&PLIC>;
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reg-shift = <2>;
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reg-shift = <2>;
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clock-frequency = <25000000>;
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clock-frequency = <50000000>;
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current-speed = <115200>;
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current-speed = <115200>;
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status = "okay";
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status = "okay";
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};
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};
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