Add exception sregs command to U-Boot

This commit is contained in:
Rodrigo Arias Mallo 2024-08-02 13:18:18 +02:00
parent 995b1e3848
commit 055f03980c
3 changed files with 76 additions and 2 deletions

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@ -3300,10 +3300,15 @@ mode interrupts unconditionally.
Let's try to cause an interruption. I would need to list all the steps. Let's try to cause an interruption. I would need to list all the steps.
mw 0x40014000 0xffffffff # Disable clock interrupt
md 0x40801000 1 # Show pending interrupts (should be 0x10)
mw 0x40802000 0x10 # Enable interrupt for source 4 (timer) mw 0x40802000 0x10 # Enable interrupt for source 4 (timer)
mw 0x40800010 0xff # Make source 4 priority large mw 0x40800010 0xff # Make source 4 priority large
md 0x40a00004 1 # Show which value should be claimed md 0x40a00004 1 # Claim interrupt (should read 4)
mw 0x40a00004 0 # Claim 0 mw 0x40a00004 4 # Complete 4
md 0x40801000 1 # Show pending interrupts (should be 0x00)
mw 0x40014000 0x00000000 # Enable clock interrupt (should cause one)
md 0x40801000 1 # Show pending interrupts (should be 0x10)
Nice, I can see the trap: Nice, I can see the trap:
@ -3338,3 +3343,25 @@ Nice, I can see the trap:
sbi_trap_error: hart0: trap0: t6=0x00000000aeed3aa0 sbi_trap_error: hart0: trap0: t6=0x00000000aeed3aa0
Now let's try delegating it to u-boot, and see if I can print some information. Now let's try delegating it to u-boot, and see if I can print some information.
I don't see any message:
Boot HART MIDELEG : 0x0000000000000222
Boot HART MEDELEG : 0x000000000000b109
...
=> mw 0x40014000 0xffffffff # Disable clock interrupt
=> md 0x40801000 1 # Show pending interrupts (should be 0x10)
40801000: 00000010 ....
=> mw 0x40802000 0x10 # Enable interrupt for source 4 (timer)
=> mw 0x40800010 0xff # Make source 4 priority large
=> md 0x40a00004 1 # Claim interrupt (should read 4)
40a00004: 00000004 ....
=> mw 0x40a00004 4 # Complete 4
=> md 0x40801000 1 # Show pending interrupts (should be 0x00)
40801000: 00000000 ....
=> mw 0x40014000 0x00000000 # Enable clock interrupt (should cause one)
=> md 0x40801000 1 # Show pending interrupts (should be 0x10)
40801000: 00000010
I made a small subcommand U-Boot "exception sregs" to be able to dump the
supervisor registers, to check they have the proper values.

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@ -219,6 +219,7 @@
patches = [ patches = [
#./u-boot-debug.patch #./u-boot-debug.patch
./uboot-debug-ext-interrupts.patch ./uboot-debug-ext-interrupts.patch
./uboot-sregs.patch
]; ];
# #
# CONFIG_SERIAL_PRESENT=n # CONFIG_SERIAL_PRESENT=n
@ -245,6 +246,7 @@
CONFIG_SMP=n CONFIG_SMP=n
CONFIG_TRACE_EARLY=y CONFIG_TRACE_EARLY=y
CONFIG_CMD_MEMTEST=y CONFIG_CMD_MEMTEST=y
CONFIG_CMD_EXCEPTION=y
'' ''
# # Enable debug logs # # Enable debug logs
# + # +

45
uboot-sregs.patch Normal file
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@ -0,0 +1,45 @@
diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c
index f38f454a0b..87877ab235 100644
--- a/cmd/riscv/exception.c
+++ b/cmd/riscv/exception.c
@@ -56,6 +56,23 @@ static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
return CMD_RET_FAILURE;
}
+static int do_sregs(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong stvec, sie, sstatus;
+
+ asm volatile ("fence");
+ asm volatile ("csrr %0, stvec" : "=r"(stvec) : );
+ asm volatile ("csrr %0, sie" : "=r"(sie) : );
+ asm volatile ("csrr %0, sstatus" : "=r"(sstatus) : );
+
+ printf("stvec : 0x%08lx\n", stvec);
+ printf("sie : 0x%08lx\n", sie);
+ printf("sstatus : 0x%08lx\n", sstatus);
+
+ return CMD_RET_SUCCESS;
+}
+
static struct cmd_tbl cmd_sub[] = {
U_BOOT_CMD_MKENT(compressed, CONFIG_SYS_MAXARGS, 1, do_compressed,
"", ""),
@@ -67,6 +84,8 @@ static struct cmd_tbl cmd_sub[] = {
"", ""),
U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
"", ""),
+ U_BOOT_CMD_MKENT(sregs, CONFIG_SYS_MAXARGS, 1, do_sregs,
+ "", ""),
};
static char exception_help_text[] =
@@ -77,6 +96,7 @@ static char exception_help_text[] =
" ialign16 - 16 bit aligned instruction\n"
" undefined - illegal instruction\n"
" unaligned - load address misaligned\n"
+ " sregs - print supervisor registers\n"
;
#include <exception.h>