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Enable machine interrupts

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This commit is contained in:
Rodrigo Arias Mallo
2024-08-21 10:13:45 +02:00
parent cc65500434
commit 2f28f9268a
1 changed files with 3 additions and 3 deletions
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6
opensbi-test-plic.patch
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@@ -154,9 +154,9 @@ index 0ae604a..000b89c 100644
+
+ sbi_printf("Timer enabled in PLIC\n");
+
+// /* Enable external timer interrupts */
+// csr_set(CSR_MIE, MIE_MEIE); /* Needed? */
+// csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */
+ /* Enable external timer interrupts */
+ csr_set(CSR_MIE, MIE_MEIE); /* Needed? */
+ csr_set(CSR_MSTATUS, MSTATUS_MIE); /* Needed? */
+
+ /*
+ * Clear mip CSR before proceeding with init to avoid any spurious