Rodrigo Arias Mallo
ce70726bf6
The one contained in the CPU SPEC ISO is built for x86, and there is no binary for RISC-V.
99 lines
2.9 KiB
Nix
99 lines
2.9 KiB
Nix
final: prev:
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# Changes to packages from nixpkgs
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{
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clangEpi = final.callPackage ./pkgs/llvm-epi/default.nix { openmp = null; };
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clangEpiUnwrapped = final.callPackage ./pkgs/llvm-epi/clang.nix { };
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stdenvClangEpi = final.stdenv.override { cc = final.buildPackages.clangEpi; allowedRequisites = null; };
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rvb = final.callPackage ./pkgs/rvb/default.nix { };
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rvb-clang = final.callPackage ./pkgs/rvb/default.nix { stdenv = final.stdenvClangEpi; };
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stream = final.callPackage ./pkgs/stream/default.nix { };
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spec-cpu-tools = final.callPackage ./pkgs/spec-cpu/tools.nix { };
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spec-cpu = final.callPackage ./pkgs/spec-cpu/default.nix { };
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spec-cpu-mini = final.callPackage ./pkgs/spec-cpu/mini.nix { };
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specinvoke = final.callPackage ./pkgs/spec-cpu/specinvoke.nix { };
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spec-cpu-clang = final.callPackage ./pkgs/spec-cpu/default.nix { stdenv = final.stdenvClangEpi; };
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blis = ((prev.blis.override {
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blas64 = true;
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withArchitecture = "generic";
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}).overrideAttrs (old: {
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nativeBuildInputs = (old.nativeBuildInputs or []) ++ [
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prev.buildPackages.gfortran
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];
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})).overrideDerivation (old : {
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configureFlags = [
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"--enable-cblas"
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"--blas-int-size=64"
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"--enable-threading=openmp"
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#"--build=x86_64-unknown-linux-gnu"
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#"--host=riscv64-unknown-linux-gnu"
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"generic"
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];
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});
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riscv-tools = prev.pkgsStatic.stdenv.mkDerivation {
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name = "riscv-tools";
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src = ./tools;
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makeFlags = [ "PREFIX=${placeholder "out"}" ];
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};
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bitstreams = builtins.fetchGit {
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url = "git@bscpm03.bsc.es:rarias/bitstreams.git";
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rev = "2f899627a226890c6f9820aa44e34c2ecea03faf";
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};
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# Baremetal tests for standalone FPGA
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sa-fpga-tests = prev.pkgsStatic.stdenv.mkDerivation {
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name = "sa-fpga-tests";
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src = builtins.fetchGit {
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url = "git@gitlab-internal.bsc.es:hwdesign/rtl/core-tile/sa-fpga.git";
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rev = "720be4f1f5dd0ef963135992578be2ab55fb5537";
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ref = "main";
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};
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dontConfigure = true;
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patches = [
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#./patches/sa-fpga-crt.patch
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#./patches/sa-fpga-text-address.patch
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./patches/sa-fpga-uart.patch
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./patches/sa-fpga-plic-registers.patch
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./patches/sa-fpga-add-plic-claim-test.patch
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];
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buildPhase = ''
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cd fpga_core_bridge/simulator/tests/c_tests/
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make RISCV_PREFIX=riscv64-unknown-linux-musl-
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# Generate binary images to be loaded in memory
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for f in *.riscv; do
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# Don't copy 0x40000000 section
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$OBJCOPY -R .tohost -O binary $f $f.bin
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done
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'';
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installPhase = ''
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ls -lah
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make install install_dir=$out
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cp -a *.bin $out
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'';
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dontFixup = true;
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hardeningDisable = [ "all" ];
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};
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rbootrom = prev.pkgsStatic.stdenv.mkDerivation {
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name = "rbootrom";
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src = ./bootrom;
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dontConfigure = true;
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buildPhase = ''
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make
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'';
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installPhase = ''
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mkdir $out
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cp rbootrom.bin rbootrom.elf $out/
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'';
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dontFixup = true;
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hardeningDisable = [ "all" ];
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};
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}
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