nixos-riscv/patches/opensbi-lagarto-hun.patch

14 lines
639 B
Diff

--- a/platform/fpga/openpiton/platform.c 2024-03-12 16:27:13.886525365 +0100
+++ b/platform/fpga/openpiton/platform.c 2024-05-27 11:42:47.748244398 +0200
@@ -24,8 +24,8 @@
#define OPENPITON_DEFAULT_UART_REG_WIDTH 1
#define OPENPITON_DEFAULT_UART_REG_OFFSET 0
#define OPENPITON_DEFAULT_PLIC_ADDR 0xfff1100000
-#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
-#define OPENPITON_DEFAULT_HART_COUNT 3
+#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 3
+#define OPENPITON_DEFAULT_HART_COUNT 20
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
#define OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ 1000000
#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \