nixos-riscv/uboot-exception-extras.patch
Rodrigo Arias Mallo 91d3e9b163 Set stvec to zero
2024-08-02 16:13:46 +02:00

67 lines
1.9 KiB
Diff

diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c
index f38f454a0b..9bc554b0aa 100644
--- a/cmd/riscv/exception.c
+++ b/cmd/riscv/exception.c
@@ -56,6 +56,41 @@ static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
return CMD_RET_FAILURE;
}
+static int do_sregs(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong stvec, sie, sip, sstatus;
+
+ asm volatile ("fence");
+ asm volatile ("csrr %0, stvec" : "=r"(stvec) : );
+ asm volatile ("csrr %0, sie" : "=r"(sie) : );
+ asm volatile ("csrr %0, sip" : "=r"(sip) : );
+ asm volatile ("csrr %0, sstatus" : "=r"(sstatus) : );
+
+ printf("stvec : 0x%016lx\n", stvec);
+ printf("sie : 0x%016lx\n", sie);
+ printf("sip : 0x%016lx\n", sip);
+ printf("sstatus : 0x%016lx\n", sstatus);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_enable(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong which = SIE_SSIE | SIE_SEIE | SIE_STIE;
+
+ asm volatile (
+ "csrsi sstatus, 2\n" /* Enable SIE */
+ "csrs sie, %0\n" /* Enable selected interrupts */
+ "csrwi stvec, 0\n" /* Redirect trap handler to NULL */
+ : /* no output */
+ : "r" (which)
+ );
+
+ return CMD_RET_SUCCESS;
+}
+
static struct cmd_tbl cmd_sub[] = {
U_BOOT_CMD_MKENT(compressed, CONFIG_SYS_MAXARGS, 1, do_compressed,
"", ""),
@@ -67,6 +102,10 @@ static struct cmd_tbl cmd_sub[] = {
"", ""),
U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
"", ""),
+ U_BOOT_CMD_MKENT(sregs, CONFIG_SYS_MAXARGS, 1, do_sregs,
+ "", ""),
+ U_BOOT_CMD_MKENT(enable, CONFIG_SYS_MAXARGS, 1, do_enable,
+ "", ""),
};
static char exception_help_text[] =
@@ -77,6 +116,8 @@ static char exception_help_text[] =
" ialign16 - 16 bit aligned instruction\n"
" undefined - illegal instruction\n"
" unaligned - load address misaligned\n"
+ " sregs - print supervisor registers\n"
+ " enable - enable supervisor interrupts\n"
;
#include <exception.h>