/dts-v1/;

/ {
  #address-cells = <1>;
  #size-cells = <1>;
  compatible = "riscv,rv64i";
  model = "Barcelona Supercomputing Center - OX";
  chosen {
		bootargs = "earlycon=sbi console=ttyS0,115200n8";
	};
  cpus {
    #address-cells = <1>;
    #size-cells = <0>;
    timebase-frequency = <50000>; // 32.768 kHz
    CPU0: cpu@0 {
      //clock-frequency = <25000000>; // 25 MHz
      clock-frequency = <50000000>; // 50 MHz
      device_type = "cpu";
      reg = <0>;
      status = "okay";
      compatible = "riscv";
      riscv,isa = "rv64imafd";
      mmu-type = "riscv,sv39";
      tlb-split;
      // HLIC - hart local interrupt controller
      CPU0_intc: interrupt-controller {
        #address-cells = <1>;
        #interrupt-cells = <1>;
        interrupt-controller;
        compatible = "riscv,cpu-intc";
      };
    };
  };

  uart0: serial@40001000 {
    compatible = "ns16750";
    //reg = <0x40001000 0x1000>;
    reg = <0x00000000 0x40001000 0x00000000 0x00001000>;
    interrupts = <0>;
    port-number = <0>;
    reg-shift = <2>;
    reg-io-width = <4>;
    clock-frequency = <25000000>;
    current-speed = <115200>;
    status = "okay";
  };

  memory@80000000 {
    device_type = "memory";
    reg = <0x80000000 0x40000000>;
  };
  soc {
    #address-cells = <1>;
    #size-cells = <1>;
    compatible = "simple-bus";
    ranges;
  };
};