Merge branch 'lagarto-ox' into 'master'

Lagarto OX support

See merge request rarias/nixos-riscv!1

JOURNAL.md

@@ -5291,3 +5291,17 @@ benchmarks too.
 
 At some point we may want to be able to specify the bootcmd from fpgactl
 directly.
+
+## 2024-10-11
+
+Another successful execution of SPEC mini:
+
+<https://pm.bsc.es/gitlab/rarias/nixos-riscv/-/jobs/34518>
+
+    benchmark        size  tune  iter  time_s
+    600.perlbench_s  test  base  1     5380.726590000
+    602.gcc_s        test  base  1     2.525468000
+    605.mcf_s        test  base  1     1927.921307000
+    620.omnetpp_s    test  base  1     1110.200756000
+    641.leela_s      test  base  1     779.333069000
+    648.exchange2_s  test  base  1     2916.464893000

README.md

@@ -2,45 +2,49 @@
 
 This repository contains NixOS configurations for different RISC-V machines.
 
-## QEMU
+## Lagarto Ox on FPGA Alveo U55C
 
-To boot the system in QEMU, first enter the development shell:
+To build the system and boot it on an FPGA of the MEEP cluster, you can run the
+following:
 
 ```
-$ nix develop
+$ nix develop -L '.#lagarto-ox' --command fpga/run-remotely.sh fpgalogin1:ci
 ```
 
-Then run the boot script:
+To do it manually, you can first enter the development shell:
 
 ```
-$ ./boot.sh
+$ nix develop -L '.#lagarto-ox'
 ```
 
-To prevent the GC from erasing the system:
+Then upload the files to the target machine (fpgalogin1 by default):
-
-```
-$ nix build .#devShells.x86_64-linux.default --out-link result-env
-```
-
-## Lagarto Hun on FPGA Alveo U55C
-
-First build required dependencies:
-
-```
-$ nix develop '.#lagarto-hun'
-```
-
-Then upload to destination:
 
 ```
 $ fpga/upload.sh
 ```
 
-And then boot the system there:
+Then connect to the fpgalogin1 machine, allocate a FPGA node and load the
+environment there:
 
 ```
-cucu$ ./boot.sh
+$ cd nixos
-...
+$ . env.sh
 ```
 
-In the U-Boot prompt, paste the commands of the `uboot.env` file.
+Flash the images to the FPGA:
+
+```
+$ ./fpgactl -w bitstream.bit -b opensbi.bin -k kernel.bin -i initrd.bin -r rootfs.img
+```
+
+And monitor the serial line:
+
+```
+$ picocom -q -b 115200 $FPGACTL_UART
+```
+
+It should boot without any user interaction.
+
+## Lagarto Hun
+
+WIP

dts/lagarto_ox.dts

@@ -205,7 +205,7 @@
 		 * property is described in
 		 * Documentation/devicetree/bindings/riscv/cpus.yaml
 		 */
-		clint: clint@40100000 {
+		clint: clint@CLINT_ADDR {
 			reg = /bits/ 64 <CLINT_ADDR CLINT_SIZE>;
 			reg-names = "control";
 			interrupts-extended = <&HLIC0 3>, <&HLIC0 7>;
@@ -217,8 +217,8 @@
 		/* There is another auxiliar clint (timer) at 40010000 for
 		 * tests, but we don't tell the kernel so we can use it for
 		 * testing interrupts manually. */
-		aux_timer: clint@40010000 {
+		aux_timer: clint@AUXTIMER_ADDR {
-			reg = /bits/ 64 <0x0 0x40010000 0x0 0x00010000>;
+			reg = /bits/ 64 <AUXTIMER_ADDR AUXTIMER_SIZE>;
 			reg-names = "control";
 			interrupts = <4>; /* PLIC input source 4 */
 			interrupt-parent = <&PLIC>;
@@ -227,23 +227,23 @@
 #endif
 
 #ifdef ENABLE_SPI
-		uart16750: serial@40005000 {
+		serial@UART2_ADDR {
 			compatible = "ns16750";
-			reg = <0x00000000 0x40005000 0x00000000 0x00001000>;
+			reg = /bits/ 64 <UART2_ADDR UART2_SIZE>;
 			interrupt-parent = <&PLIC>;
 			interrupts = <5>;
 			clock-frequency = <CPU_FREQ>;
-			current-speed = <0x0001c200>;
+			current-speed = <UART2_SPEED>;
 			status = "okay";
 		};
-		spi0: spi@40007000 {
+		spi@SPI_ADDR {
 			compatible = "ti,keystone-spi";
-			reg = <0x00000000 0x40007000 0x00000000 0x00001000>;
+			reg = /bits/ 64 <SPI_ADDR SPI_SIZE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupt-parent = <&PLIC>;
 			interrupt-names = "intvec0", "intvec1";
-			interrupts = <6 0>, <0x00000007 0>;
+			interrupts = <6 0>, <7 0>;
 			ti,davinci-spi-intr-line = <0>;
 			spi-max-frequency = <24000000>;
 			loopback-mode = <1>;

dts/lagarto_ox.h

@@ -1,3 +1,13 @@
+/* Toggles */
+
+#define ENABLE_UART0
+#define ENABLE_UART1
+#define ENABLE_ETHERNET
+#define ENABLE_AXIDMA
+#define ENABLE_PLIC
+#define ENABLE_CLINT
+//#define ENABLE_SPI
+
 #define CPU_FREQ	50000000 /* 50 MHz */
 /* FIXME: The real RTC frequency is around half that, as the divider was wrongly
  * configured. So for now lets use the real frequency:
@@ -9,7 +19,8 @@
  * [0x0_4000_0000, 0x0_6000_0000) -> IO       (512 MiB)
  * [0x0_6000_0000, 0x0_7000_0000) -> DMA pool (256 MiB)
  * [0x0_7000_0000, 0x0_8000_0000) -> DMA pool (256 MiB)
- * [0x0_8000_0000, 0x1_c000_0000) -> RAM memory (5 GiB)
+ * [0x0_8000_0000, 0x1_8000_0000) -> RAM memory (4 GiB)
+ * [0x1_8000_0000, 0x1_c000_0000) -> Unused     (1 GiB)
  * [0x1_c000_0000, 0x2_8000_0000) -> PMEM       (3 GiB)
  */
 
@@ -21,6 +32,14 @@
 #define UART1_ADDR	0x40003000
 #define UART1_SIZE	0x00001000
 
+/* UART2 via SPI */
+#define UART2_SPEED	UART0_SPEED
+#define UART2_ADDR	0x40005000
+#define UART2_SIZE	0x00001000
+
+#define SPI_ADDR	0x40007000
+#define SPI_SIZE	0x00001000
+
 #define AUXTIMER_ADDR	0x40010000
 #define AUXTIMER_SIZE	0x00010000
 
@@ -35,7 +54,12 @@
 
 #define PLIC_ADDR	0x40800000
 #define PLIC_SIZE	0x00400000
+
+#ifdef ENABLE_SPI
+# define PLIC_NDEV	7 /* extra UART2 + 2 x SPI */
+#else
 # define PLIC_NDEV	4
+#endif
 
 #define ETHPOOL_ADDR	0x60000000
 #define ETHPOOL_SIZE	0x10000000
@@ -46,17 +70,7 @@
 /* Notice addresses > 32 bits from here */
 
 #define MEM_ADDR	0x080000000
-#define MEM_SIZE	0x140000000
+#define MEM_SIZE	0x100000000
 
 #define PMEM_ADDR	0x1c0000000
 #define PMEM_SIZE	0x0c0000000
-
-/* Toggles */
-
-#define ENABLE_UART0
-#define ENABLE_UART1
-#define ENABLE_ETHERNET
-#define ENABLE_AXIDMA
-#define ENABLE_PLIC
-#define ENABLE_CLINT
-//#define ENABLE_SPI

fpga/run-login.sh

@@ -42,7 +42,7 @@ fi
 
 # If this point is reached there is one job running
 
-host=$(squeue -h -o %N)
+host=$(squeue --me -h -o %N)
 echo "Switching to $host"
 
 # Continue the execution there

fpga/run-node.sh

@@ -21,12 +21,12 @@ set -x
 ./fpgactl -w bitstream.bit -b opensbi.bin -k kernel.bin -i initrd.bin -r rootfs.img
 
 # Normal timeouts
-#timeout=$((30 * 60)) # Always stop after 30 min
+timeout=$((30 * 60)) # Always stop after 30 min
-#timeout_silent=$((3 * 60)) # Stop if 3 min without output
+timeout_silent=$((3 * 60)) # Stop if 3 min without output
 
 # Timeouts for SPEC benchmarks
-timeout=$((6 * 60 * 60)) # Always stop after 6 h
+#timeout=$((12 * 60 * 60)) # Always stop after 12 h
-timeout_silent=$((2 * 60 * 60)) # Stop if 2 h without output (some benchmarks take 1.6h)
+#timeout_silent=$((4 * 60 * 60)) # Stop if 4 h without output (some benchmarks take 1.6h)
 
 # Set dead switch
 sleep $timeout && killall picocom &

lagarto-ox.nix

@@ -453,16 +453,16 @@
       preConfigure = ''
         cp ${final.uboot-env} board/emulation/qemu-riscv/environ.env
       '';
-      postConfigure = ''
+      #postConfigure = ''
-        echo --------------------------- generated config:
+      #  echo --------------------------- generated config:
-        cat .config
+      #  cat .config
-        echo ---------------------------
+      #  echo ---------------------------
-      '';
+      #'';
-      postBuild = ''
+      #postBuild = ''
-        echo --------------------------- generated env starts
+      #  echo --------------------------- generated env starts
-        cat include/generated/env.in
+      #  cat include/generated/env.in
-        echo --------------------------- generated env ends
+      #  echo --------------------------- generated env ends
-      '';
+      #'';
       #
       # CONFIG_SERIAL_PRESENT=n
       # CONFIG_SYS_NS16550=n
@@ -502,7 +502,7 @@
 #      ''
       ;
       extraMakeFlags = [
-        "V=1"
+        #"V=1"
         #"KCPPFLAGS=-DLOG_DEBUG"
         #"EXT_DTB=${final.ox-dtb}/lagarto_ox.dtb"
       ];
@@ -540,7 +540,7 @@
     in prev.runCommand "uboot.txt" {} ''
       cat > $out <<EOF
       xtrace=yes
-      bootargs=root=/dev/ram0 loglevel=7 rw earlycon=sbi console=hvc0 bench2 init=${init}
+      bootargs=root=/dev/ram0 loglevel=7 rw earlycon=sbi console=hvc0 debug2 init=${init}
       ramdisk_size=$(stat --format %s $(readlink -f ${initrd}))
       bootcmd=fdt print; booti \''${kernel_addr_r} \''${ramdisk_addr_r}:\''${ramdisk_size} \''${fdtcontroladdr}
       EOF

patches/stage-2-init.sh

@@ -1,8 +1,6 @@
 #! @shell@
 
-set -x
+#set -x
-
-echo "--- starting stage 2 ---"
 
 systemConfig=@systemConfig@
 
@@ -10,6 +8,11 @@ export HOME=/root PATH="@path@"
 
 
 if [ "${IN_NIXOS_SYSTEMD_STAGE1:-}" != true ]; then
+    # Print a greeting.
+    echo
+    echo -e "\e[1;32m<<< @distroName@ Stage 2 >>>\e[0m"
+    echo
+
     # Process the kernel command line.
     for o in $(</proc/cmdline); do
         case $o in
@@ -28,13 +31,6 @@ if [ "${IN_NIXOS_SYSTEMD_STAGE1:-}" != true ]; then
         esac
     done
 
-
-    # Print a greeting.
-    echo
-    echo -e "\e[1;32m<<< @distroName@ Stage 2 >>>\e[0m"
-    echo
-
-
     # Normally, stage 1 mounts the root filesystem read/writable.
     # However, in some environments, stage 2 is executed directly, and the
     # root is read-only.  So make it writable here.