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14
JOURNAL.md
14
JOURNAL.md
@ -5291,17 +5291,3 @@ benchmarks too.
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At some point we may want to be able to specify the bootcmd from fpgactl
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directly.
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## 2024-10-11
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Another successful execution of SPEC mini:
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<https://pm.bsc.es/gitlab/rarias/nixos-riscv/-/jobs/34518>
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benchmark size tune iter time_s
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600.perlbench_s test base 1 5380.726590000
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602.gcc_s test base 1 2.525468000
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605.mcf_s test base 1 1927.921307000
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620.omnetpp_s test base 1 1110.200756000
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641.leela_s test base 1 779.333069000
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648.exchange2_s test base 1 2916.464893000
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52
README.md
52
README.md
@ -2,49 +2,45 @@
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This repository contains NixOS configurations for different RISC-V machines.
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## Lagarto Ox on FPGA Alveo U55C
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## QEMU
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To build the system and boot it on an FPGA of the MEEP cluster, you can run the
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following:
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To boot the system in QEMU, first enter the development shell:
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```
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$ nix develop -L '.#lagarto-ox' --command fpga/run-remotely.sh fpgalogin1:ci
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$ nix develop
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```
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To do it manually, you can first enter the development shell:
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Then run the boot script:
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```
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$ nix develop -L '.#lagarto-ox'
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$ ./boot.sh
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```
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Then upload the files to the target machine (fpgalogin1 by default):
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To prevent the GC from erasing the system:
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```
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$ nix build .#devShells.x86_64-linux.default --out-link result-env
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```
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## Lagarto Hun on FPGA Alveo U55C
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First build required dependencies:
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```
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$ nix develop '.#lagarto-hun'
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```
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Then upload to destination:
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```
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$ fpga/upload.sh
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```
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Then connect to the fpgalogin1 machine, allocate a FPGA node and load the
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environment there:
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And then boot the system there:
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```
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$ cd nixos
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$ . env.sh
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cucu$ ./boot.sh
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...
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```
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Flash the images to the FPGA:
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```
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$ ./fpgactl -w bitstream.bit -b opensbi.bin -k kernel.bin -i initrd.bin -r rootfs.img
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```
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And monitor the serial line:
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```
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$ picocom -q -b 115200 $FPGACTL_UART
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```
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It should boot without any user interaction.
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## Lagarto Hun
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WIP
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In the U-Boot prompt, paste the commands of the `uboot.env` file.
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@ -205,7 +205,7 @@
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* property is described in
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* Documentation/devicetree/bindings/riscv/cpus.yaml
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*/
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clint: clint@CLINT_ADDR {
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clint: clint@40100000 {
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reg = /bits/ 64 <CLINT_ADDR CLINT_SIZE>;
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reg-names = "control";
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interrupts-extended = <&HLIC0 3>, <&HLIC0 7>;
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@ -217,8 +217,8 @@
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/* There is another auxiliar clint (timer) at 40010000 for
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* tests, but we don't tell the kernel so we can use it for
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* testing interrupts manually. */
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aux_timer: clint@AUXTIMER_ADDR {
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reg = /bits/ 64 <AUXTIMER_ADDR AUXTIMER_SIZE>;
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aux_timer: clint@40010000 {
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reg = /bits/ 64 <0x0 0x40010000 0x0 0x00010000>;
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reg-names = "control";
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interrupts = <4>; /* PLIC input source 4 */
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interrupt-parent = <&PLIC>;
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@ -227,23 +227,23 @@
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#endif
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#ifdef ENABLE_SPI
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serial@UART2_ADDR {
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uart16750: serial@40005000 {
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compatible = "ns16750";
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reg = /bits/ 64 <UART2_ADDR UART2_SIZE>;
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reg = <0x00000000 0x40005000 0x00000000 0x00001000>;
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interrupt-parent = <&PLIC>;
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interrupts = <5>;
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clock-frequency = <CPU_FREQ>;
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current-speed = <UART2_SPEED>;
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current-speed = <0x0001c200>;
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status = "okay";
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};
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spi@SPI_ADDR {
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spi0: spi@40007000 {
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compatible = "ti,keystone-spi";
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reg = /bits/ 64 <SPI_ADDR SPI_SIZE>;
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reg = <0x00000000 0x40007000 0x00000000 0x00001000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&PLIC>;
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interrupt-names = "intvec0", "intvec1";
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interrupts = <6 0>, <7 0>;
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interrupts = <6 0>, <0x00000007 0>;
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ti,davinci-spi-intr-line = <0>;
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spi-max-frequency = <24000000>;
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loopback-mode = <1>;
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@ -1,13 +1,3 @@
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/* Toggles */
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#define ENABLE_UART0
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#define ENABLE_UART1
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#define ENABLE_ETHERNET
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#define ENABLE_AXIDMA
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#define ENABLE_PLIC
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#define ENABLE_CLINT
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//#define ENABLE_SPI
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#define CPU_FREQ 50000000 /* 50 MHz */
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/* FIXME: The real RTC frequency is around half that, as the divider was wrongly
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* configured. So for now lets use the real frequency:
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@ -19,8 +9,7 @@
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* [0x0_4000_0000, 0x0_6000_0000) -> IO (512 MiB)
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* [0x0_6000_0000, 0x0_7000_0000) -> DMA pool (256 MiB)
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* [0x0_7000_0000, 0x0_8000_0000) -> DMA pool (256 MiB)
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* [0x0_8000_0000, 0x1_8000_0000) -> RAM memory (4 GiB)
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* [0x1_8000_0000, 0x1_c000_0000) -> Unused (1 GiB)
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* [0x0_8000_0000, 0x1_c000_0000) -> RAM memory (5 GiB)
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* [0x1_c000_0000, 0x2_8000_0000) -> PMEM (3 GiB)
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*/
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@ -32,14 +21,6 @@
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#define UART1_ADDR 0x40003000
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#define UART1_SIZE 0x00001000
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/* UART2 via SPI */
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#define UART2_SPEED UART0_SPEED
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#define UART2_ADDR 0x40005000
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#define UART2_SIZE 0x00001000
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#define SPI_ADDR 0x40007000
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#define SPI_SIZE 0x00001000
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#define AUXTIMER_ADDR 0x40010000
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#define AUXTIMER_SIZE 0x00010000
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@ -54,12 +35,7 @@
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#define PLIC_ADDR 0x40800000
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#define PLIC_SIZE 0x00400000
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#ifdef ENABLE_SPI
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# define PLIC_NDEV 7 /* extra UART2 + 2 x SPI */
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#else
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#define PLIC_NDEV 4
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#endif
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#define ETHPOOL_ADDR 0x60000000
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#define ETHPOOL_SIZE 0x10000000
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@ -70,7 +46,17 @@
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/* Notice addresses > 32 bits from here */
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#define MEM_ADDR 0x080000000
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#define MEM_SIZE 0x100000000
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#define MEM_SIZE 0x140000000
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#define PMEM_ADDR 0x1c0000000
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#define PMEM_SIZE 0x0c0000000
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/* Toggles */
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#define ENABLE_UART0
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#define ENABLE_UART1
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#define ENABLE_ETHERNET
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#define ENABLE_AXIDMA
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#define ENABLE_PLIC
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#define ENABLE_CLINT
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//#define ENABLE_SPI
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@ -42,7 +42,7 @@ fi
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# If this point is reached there is one job running
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host=$(squeue --me -h -o %N)
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host=$(squeue -h -o %N)
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echo "Switching to $host"
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# Continue the execution there
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@ -21,12 +21,12 @@ set -x
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./fpgactl -w bitstream.bit -b opensbi.bin -k kernel.bin -i initrd.bin -r rootfs.img
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# Normal timeouts
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timeout=$((30 * 60)) # Always stop after 30 min
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timeout_silent=$((3 * 60)) # Stop if 3 min without output
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#timeout=$((30 * 60)) # Always stop after 30 min
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#timeout_silent=$((3 * 60)) # Stop if 3 min without output
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# Timeouts for SPEC benchmarks
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#timeout=$((12 * 60 * 60)) # Always stop after 12 h
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#timeout_silent=$((4 * 60 * 60)) # Stop if 4 h without output (some benchmarks take 1.6h)
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timeout=$((6 * 60 * 60)) # Always stop after 6 h
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timeout_silent=$((2 * 60 * 60)) # Stop if 2 h without output (some benchmarks take 1.6h)
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# Set dead switch
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sleep $timeout && killall picocom &
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@ -453,16 +453,16 @@
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preConfigure = ''
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cp ${final.uboot-env} board/emulation/qemu-riscv/environ.env
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'';
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#postConfigure = ''
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# echo --------------------------- generated config:
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# cat .config
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# echo ---------------------------
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#'';
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#postBuild = ''
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# echo --------------------------- generated env starts
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# cat include/generated/env.in
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# echo --------------------------- generated env ends
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#'';
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postConfigure = ''
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echo --------------------------- generated config:
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cat .config
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echo ---------------------------
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'';
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postBuild = ''
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echo --------------------------- generated env starts
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cat include/generated/env.in
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echo --------------------------- generated env ends
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'';
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#
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# CONFIG_SERIAL_PRESENT=n
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# CONFIG_SYS_NS16550=n
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@ -502,7 +502,7 @@
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# ''
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;
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extraMakeFlags = [
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#"V=1"
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"V=1"
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#"KCPPFLAGS=-DLOG_DEBUG"
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#"EXT_DTB=${final.ox-dtb}/lagarto_ox.dtb"
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];
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@ -540,7 +540,7 @@
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in prev.runCommand "uboot.txt" {} ''
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cat > $out <<EOF
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xtrace=yes
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bootargs=root=/dev/ram0 loglevel=7 rw earlycon=sbi console=hvc0 debug2 init=${init}
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bootargs=root=/dev/ram0 loglevel=7 rw earlycon=sbi console=hvc0 bench2 init=${init}
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ramdisk_size=$(stat --format %s $(readlink -f ${initrd}))
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bootcmd=fdt print; booti \''${kernel_addr_r} \''${ramdisk_addr_r}:\''${ramdisk_size} \''${fdtcontroladdr}
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EOF
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@ -1,6 +1,8 @@
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#! @shell@
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#set -x
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set -x
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echo "--- starting stage 2 ---"
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systemConfig=@systemConfig@
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@ -8,11 +10,6 @@ export HOME=/root PATH="@path@"
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if [ "${IN_NIXOS_SYSTEMD_STAGE1:-}" != true ]; then
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# Print a greeting.
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echo
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echo -e "\e[1;32m<<< @distroName@ Stage 2 >>>\e[0m"
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echo
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# Process the kernel command line.
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for o in $(</proc/cmdline); do
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case $o in
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@ -31,6 +28,13 @@ if [ "${IN_NIXOS_SYSTEMD_STAGE1:-}" != true ]; then
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esac
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done
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# Print a greeting.
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echo
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echo -e "\e[1;32m<<< @distroName@ Stage 2 >>>\e[0m"
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echo
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# Normally, stage 1 mounts the root filesystem read/writable.
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# However, in some environments, stage 2 is executed directly, and the
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# root is read-only. So make it writable here.
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