Commit Graph

4 Commits

Author SHA1 Message Date
05898c5f85 Revert UART speed to 50MHz following vivado log
> UART Name g_UART IntfLabel m_axi_uart SyncClk {Label CLK0 Freq 50000000
> Name clk_i} BaseAddr 0x0 Number 2 AxiAddrWidth 0 AxiDataWidth 0 AxiIdWidth
> 0 AxiUserWidth 0 Mode normal IRQ uart_irq
2024-07-04 17:57:26 +02:00
7eeb16ecfb Reduce frequency of UART clock to 25 MHz 2024-07-04 17:30:57 +02:00
65c7eca2c8 Fix OpenSBI configuration for newer versions
OpenSBI 1.3 an newer require the heap_size to be specified in the
sbi_platform structure, othewise the default 0 value causes a hangg at
the start. I found the problem after bisecting OpenSBI:

  # Bisect opensbi
  version = src.shortRev;
  src = builtins.fetchGit {
    url = "file:///home/Computational/rarias/riscv/opensbi";
    #rev = "908be1b85c8ff0695ea226fbbf0ff24a779cdece"; #good
    #rev = "6bc02dede86c47f87e65293b7099e9caf3b22c29"; #good
    #rev = "bbff53fe3b6cdd3c9bc084d489640d7ee2a3f831"; #bad
    #rev = "8b99a7f7d8294be29e18a667d51e13755ed2c0e0"; #good
    #rev = "bdde2ecd27af1ac158669809f6658376fb5137ab"; #good
    #rev = "5cf9a540164a018a31a679578a27eb964af0340d"; #good
    #rev = "2a04f7037317c6c5b591b160a074c700de9b3378"; #bad
    rev = "40d36a6673131e36075b1df78af4d7ab92e8cc01"; #bad
  };
2024-07-01 13:28:32 +02:00
1bfc32e91a Working OpenSBI 1.2 2024-06-27 11:29:15 +02:00