diff --git a/ox-plic.dts b/ox-plic.dts
index f66ce9a..31cf650 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -7,7 +7,7 @@
 
 	aliases {
 		serial0 = &uart_console; // ttyS0
-		serial1 = &uart_testing; // ttyS1
+//		serial1 = &uart_testing; // ttyS1
 	};
 
 //	chosen {
@@ -120,6 +120,8 @@
 		uart_console: serial@40001000 {
 			compatible = "ns16550";
 			reg = <0x0 0x40001000 0x0 0x1000>;
+			interrupts = <1>; /* Output interrupt 1 */
+			interrupt-parent = <&PLIC>;
 			reg-shift = <2>;
 			/* No interrupts for this UART, use console=hvc0 */
 			/* This clock is the SERIAL_CLK */
@@ -127,17 +129,17 @@
 			current-speed = <115200>;
 			status = "okay";
 		};
-		/* The serial for interrupt tests */
-		uart_testing: serial@40003000 {
-			compatible = "ns16550";
-			reg = <0x0 0x40003000 0x0 0x1000>;
-			interrupts = <1>; /* Output interrupt 1 */
-			interrupt-parent = <&PLIC>;
-			reg-shift = <2>;
-			clock-frequency = <50000000>;
-			current-speed = <115200>;
-			status = "okay";
-		};
+//		/* The serial for interrupt tests */
+//		uart_testing: serial@40003000 {
+//			compatible = "ns16550";
+//			reg = <0x0 0x40003000 0x0 0x1000>;
+//			interrupts = <1>; /* Output interrupt 1 */
+//			interrupt-parent = <&PLIC>;
+//			reg-shift = <2>;
+//			clock-frequency = <50000000>;
+//			current-speed = <115200>;
+//			status = "okay";
+//		};
 
 //		ethernet0 {
 //			xlnx,rxmem = <0x000005f2>;