From a7c6a6f1e635134439aa06447fb24b6e3081306d Mon Sep 17 00:00:00 2001
From: Rodrigo Arias Mallo <rodrigo.arias@bsc.es>
Date: Fri, 30 Aug 2024 15:10:46 +0200
Subject: [PATCH] Add CLINT to device tree at 0x4010_0000

---
 ox-plic.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ox-plic.dts b/ox-plic.dts
index e0191f4..2bcce4c 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -224,6 +224,12 @@
 		 * property is described in
 		 * Documentation/devicetree/bindings/riscv/cpus.yaml
 		 */
+		clint: clint@40100000 {
+			reg = <0x0 0x40100000 0x0 0x00010000>;
+			reg-names = "control";
+			interrupts-extended = <&HLIC0 3>, <&HLIC0 7>;
+			compatible = "riscv,clint0";
+		};
 //		clint: clint@40002000 {
 //			/* MTIME and MTIMECMP address and size pairs */
 //			reg = <0x0 0x40002000 0x0 0x8>, <0x0 0x40002008 0x0 0x8>;