From 98f794e52d21564811dff70268faccf794636306 Mon Sep 17 00:00:00 2001
From: Rodrigo Arias Mallo <rodarima@gmail.com>
Date: Fri, 2 Aug 2024 15:27:20 +0200
Subject: [PATCH] Enable timer command in U-Boot

---
 JOURNAL.md     | 45 +++++++++++++++++++++++++++++++++++++++++++++
 lagarto-ox.nix |  1 +
 2 files changed, 46 insertions(+)

diff --git a/JOURNAL.md b/JOURNAL.md
index 23e2cb1..fb84783 100644
--- a/JOURNAL.md
+++ b/JOURNAL.md
@@ -3365,3 +3365,48 @@ I don't see any message:
 
 I made a small subcommand U-Boot "exception sregs" to be able to dump the
 supervisor registers, to check they have the proper values.
+
+    Boot HART MIDELEG         : 0x0000000000000222
+    Boot HART MEDELEG         : 0x000000000000b109
+    ><E
+    ><E<><Ed><Ee><Eb><Eu><Eg><E_><Eu><Ea><Er><Et><E>><E
+    ><E><E>Core:  11 devices, 8 uclasses, devicetree: board
+    Loading Environment from nowhere... OK
+    In:    serial,usbkbd
+    Out:   serial,vidconsole
+    Err:   serial,vidconsole
+    No working controllers found
+    Net:   No ethernet found.
+    Working FDT set to c0000000
+    Hit any key to stop autoboot:  0
+    => exception sregs
+    stvec   : 0x00000000af6f4400
+    sie     : 0x0000000000000000
+    sip     : 0x0000000000000000
+    sstatus : 0x8000000200006000
+    => exception enable
+    => exception sregs
+    stvec   : 0x00000000af6f4400
+    sie     : 0x0000000000000222
+    sip     : 0x0000000000000000
+    sstatus : 0x8000000200006002
+    => mw 0x40014000 0xffffffff # Disable clock interrupt
+    => md 0x40801000 1 # Show pending interrupts (should be 0x10)
+    40801000: 00000010                             ....
+    => mw 0x40802000 0x10 # Enable interrupt for source 4 (timer)
+    => mw 0x40800010 0xff # Make source 4 priority large
+    => md 0x40a00004 1 # Claim interrupt (should read 4)
+    40a00004: 00000004                             ....
+    => mw 0x40a00004 4 # Complete 4
+    => md 0x40801000 1 # Show pending interrupts (should be 0x00)
+    40801000: 00000000                             ....
+    => mw 0x40014000 0x00000000 # Enable clock interrupt (should cause one)
+    => md 0x40801000 1 # Show pending interrupts (should be 0x10)
+    40801000: 00000010                             ....
+    => exception sregs
+    stvec   : 0x00000000af6f4400
+    sie     : 0x0000000000000222
+    sip     : 0x0000000000000200
+    sstatus : 0x8000000200006002
+
+Now I can see the external interrupt in supervisor arriving to the SIP.
diff --git a/lagarto-ox.nix b/lagarto-ox.nix
index 13a0155..636cc8e 100644
--- a/lagarto-ox.nix
+++ b/lagarto-ox.nix
@@ -247,6 +247,7 @@
         CONFIG_TRACE_EARLY=y
         CONFIG_CMD_MEMTEST=y
         CONFIG_CMD_EXCEPTION=y
+        CONFIG_CMD_TIMER=y
       ''
 #      # Enable debug logs
 #      +