diff --git a/flake.nix b/flake.nix
index cef84f7..a8a68fc 100644
--- a/flake.nix
+++ b/flake.nix
@@ -116,11 +116,11 @@
       build = nixosconf.config.system.build;
     in syspkgs.mkShell {
       pname = "lagarto-ox-shell";
-      TOPLEVEL = build.toplevel;
+      #TOPLEVEL = build.toplevel;
       OPENSBI = syspkgs.opensbi;
       KERNEL = build.kernel;
       INITRD = build.initialRamdisk;
-      ROOTFS = build.sdImage;
+      #ROOTFS = build.sdImage;
       UBOOT_ENV = syspkgs.uboot-env;
       shellHook = ''
         echo "Here are the current system pieces:"
diff --git a/fpga/upload.sh b/fpga/upload.sh
index a47a667..f36d23b 100755
--- a/fpga/upload.sh
+++ b/fpga/upload.sh
@@ -3,19 +3,21 @@
 set -e
 set -x
 
-dst=femu:nixos/
+#dst=femu:nixos/
+dst=fpgalogin1:nixos/
 
 if [ "$1" != "" ]; then
   dst="$1"
 fi
 
-rsync -a fpga/fpgactl "$dst"
-rsync -a fpga/boot.sh "$dst"
+#rsync -a fpga/fpgactl "$dst"
+#rsync -a fpga/boot.sh "$dst"
 rsync -a fpga/env.sh "$dst"
-rsync "$OPENSBI/share/opensbi/lp64/fpga/openpiton/firmware/fw_payload.bin" "$dst/opensbi.bin"
+#rsync "$OPENSBI/share/opensbi/lp64/fpga/openpiton/firmware/fw_payload.bin" "$dst/opensbi.bin"
+rsync "$OPENSBI/share/opensbi/lp64d/fpga/ox_alveo/firmware/fw_payload.bin" "$dst/opensbi.bin"
 rsync "$KERNEL/Image" "$dst/kernel.bin"
 rsync "$INITRD/initrd" "$dst/initrd.bin"
-rsync "$ROOTFS/sd-image/rootfs.img" "$dst/rootfs.img"
+#rsync "$ROOTFS/sd-image/rootfs.img" "$dst/rootfs.img"
 rsync "$UBOOT_ENV" "$dst/uboot.env"
 
 echo "Now go to $dst and run ./boot.sh"
diff --git a/ox-plic.dts b/ox-plic.dts
index 43cbfcc..e9afd0c 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -33,14 +33,12 @@
 	 *
 	 * [0x0_6000_0000, 0x0_7000_0000) -> DMA pool (256 MiB)
 	 * [0x0_7000_0000, 0x0_8000_0000) -> DMA pool (256 MiB)
-	 * [0x0_8000_0000, 0x0_f7e0_0000) -> RAM memory (~1.8 GiB)
-	 * [0x0_f7e0_0000, 0x1_b7f0_0000) -> PMEM3 (3 GiB)
-	 * [0x1_b7f0_0000, 0x1_bff0_0000) -> PMEM2 (128 MiB)
+	 * [0x0_8000_0000, 0x1_bff0_0000) -> RAM memory (~5 GiB)
 	 * [0x1_bff0_0000, 0x2_8000_0000) -> PMEM (3 GiB)
 	 */
 	memory@80000000 {
 		device_type = "memory";
-		reg = <0x00000000 0x80000000 0x00000000 0x77e00000>;
+		reg = <0x00000000 0x80000000 0x00000001 0x3ff00000>;
 	};
 	reserved-memory {
 		#address-cells = <0x00000002>;
@@ -64,22 +62,14 @@
 		phandle = <0x00000002>;
 	};
 	pmem@1bff00000 {
+		/* volatile; This property indicates that this region is
+		 * actually backed by non-persistent memory. This lets the OS
+		 * know that it may skip the cache flushes required to ensure
+		 * data is made persistent after a write. */
 		volatile;
 		compatible = "pmem-region";
 		reg = <0x00000001 0xbff00000 0x00000000 0xc0100000>;
 	};
-	pmem2@1b7f00000 {
-		#address-cells = <0x00000002>;
-		#size-cells = <0x00000002>;
-		volatile;
-		compatible = "pmem-region";
-		reg = <0x00000001 0xb7f00000 0x00000000 0x08000000>;
-	};
-	pmem3@f7e00000 {
-		volatile;
-		compatible = "pmem-region";
-		reg = <0x00000000 0xf7e00000 0x00000000 0xc0100000>;
-	};
 	soc {
 		#address-cells = <0x00000002>;
 		#size-cells = <0x00000002>;