Add UART patch for FPGA in sa-fpga tests

overlay.nix

@@ -86,6 +86,7 @@ final: prev:
     patches = [
       #./sa-fpga-crt.patch
       #./sa-fpga-text-address.patch
+      ./sa-fpga-uart.patch
     ];
     buildPhase = ''
       cd fpga_core_bridge/simulator/tests/c_tests/

sa-fpga-uart.patch

@@ -0,0 +1,31 @@
+diff --git a/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c b/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c
+index 278ea97..287e5fc 100644
+--- a/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c
++++ b/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c
+@@ -592,8 +592,18 @@ int uart_is_transmit_empty() {
+ 
+ // Function to write a character to the UART
+ void uart_write_char(char c) {
+-    while (!uart_is_transmit_empty());
++    //while (!uart_is_transmit_empty());
++
++    /* Delay it a bit, as checking the transmit holding register doesn't seem to
++     * work in the FPGA */
++    for (volatile long i = 0; i < 10000; i++)
++        ;
++
+     *(volatile uint8_t *)(UART_BASE + UART_THR) = c;
++
++    /* Make new line go back to the start of the line */
++    if (c == '\n')
++	    uart_write_char('\r');
+ }
+ 
+ // Function to write a string to the UART
+@@ -602,4 +612,4 @@ void uart_write_string(const char* str) {
+         uart_write_char(*str++);
+         asm("fence");
+     }
+-}
+\ No newline at end of file
++}