diff --git a/opensbi-test-plic.patch b/opensbi-test-plic.patch
index ac25326..d85a3c1 100644
--- a/opensbi-test-plic.patch
+++ b/opensbi-test-plic.patch
@@ -1,5 +1,5 @@
 diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
-index 0ae604a..7b1d95e 100644
+index 0ae604a..e34e90c 100644
 --- a/lib/sbi/sbi_irqchip.c
 +++ b/lib/sbi/sbi_irqchip.c
 @@ -9,6 +9,9 @@
@@ -25,7 +25,7 @@ index 0ae604a..7b1d95e 100644
  
  	return 0;
  }
-@@ -47,8 +52,163 @@ void sbi_irqchip_exit(struct sbi_scratch *scratch)
+@@ -47,8 +52,170 @@ void sbi_irqchip_exit(struct sbi_scratch *scratch)
  {
  	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
  
@@ -46,12 +46,12 @@ index 0ae604a..7b1d95e 100644
 +#define MIDELEG_SEIE	(1UL << 9) // Delegate Machine External Interrupt to Supervisor
 +#define PLIC_TIMER_PORT	4
 +// Base address of PLIC
-+#define PLIC_BASE               0x0000000040800000UL
++#define PLIC_BASE               0x40800000UL
 +#define PLIC_PRIORITY_OFFSET    0x0UL
 +#define PLIC_PENDING_OFFSET     0x1000UL
-+#define PLIC_ENABLE_OFFSET      0x2000UL
-+#define PLIC_THRESHOLD_OFFSET   0x200000UL
-+#define PLIC_CLAIM_OFFSET       0x200004UL
++#define PLIC_ENABLE_OFFSET      0x2080UL
++#define PLIC_THRESHOLD_OFFSET   0x201000UL
++#define PLIC_CLAIM_OFFSET       0x201004UL
 +
 +// Aux timer
 +#define AUX_TIMER_BASE   0x40010000UL
@@ -86,6 +86,8 @@ index 0ae604a..7b1d95e 100644
 +		   prefix, suffix, csr_read(CSR_SIP));
 +	sbi_printf("%sSSTATUS%s: 0x%" PRILX "\n",
 +		   prefix, suffix, csr_read(CSR_SSTATUS));
++	sbi_printf("%sSTVEC%s: 0x%" PRILX "\n",
++		   prefix, suffix, csr_read(CSR_STVEC));
 +}
 +
 +static void __attribute__((optimize("O0"))) switch_to_supervisor_mode(int (*target_address)(void))
@@ -129,9 +131,12 @@ index 0ae604a..7b1d95e 100644
 +	return 0;
 +}
 +
-+static void supervisor_trap_entry(void)
++static void __attribute__((aligned(4))) __attribute__((interrupt ("supervisor"))) supervisor_trap_entry(void)
 +{
-+    sbi_printf("\nSupervisor Trap Entry Reached!\nTEST-RESULT-OK\n");
++    sbi_printf("\nSupervisor Trap Entry Reached!\n");
++    sbi_printf("\nTEST-RESULT-OK\n");
++    while (1) {
++    }
 +}
 +
 +static void do_plic_test(void)
@@ -144,10 +149,12 @@ index 0ae604a..7b1d95e 100644
 +
 +
 +	/* Enable supervisor interrupt delegation */
++
 +	csr_set(CSR_SIE, SIE_SEIE); // Enable supervisor external interrupts
 +	csr_set(CSR_SSTATUS, SSTATUS_SIE); // Enable global interrupts in supervisor mode
 +	csr_set(CSR_MIDELEG, MIDELEG_SEIE); // Delegate machine interrupts to supervisor mode
-+	csr_set(CSR_STVEC, &supervisor_trap_entry);
++	csr_write(CSR_STVEC, &supervisor_trap_entry);
++
 +	sbi_printf("Enabled supervisor delegation:\n");
 +
 +	dumpregs(1);