diff --git a/JOURNAL.md b/JOURNAL.md
index eb92795..25681be 100644
--- a/JOURNAL.md
+++ b/JOURNAL.md
@@ -3460,3 +3460,74 @@ Let's try to cause an interrupt with the normal CLINT:
 No interrupts seem to arrive at the SIP register.
 
 Let's set the stvec to zero, so it causes a machine exception.
+
+# 2024-08-21
+
+I tried with the new bitstream (ox_u55c_46619ef4.bit) setting the stvec to zero
+and I can see the OpenSBI handler stopping, probably due to the jump to zero
+address:
+
+    Boot HART MIDELEG         : 0x0000000000000222
+    Boot HART MEDELEG         : 0x000000000000b109
+    ><E
+    ><E<><Ed><Ee><Eb><Eu><Eg><E_><Eu><Ea><Er><Et><E>><E
+    ><E><E>Core:  11 devices, 8 uclasses, devicetree: board
+    Loading Environment from nowhere... OK
+    In:    serial,usbkbd
+    Out:   serial,vidconsole
+    Err:   serial,vidconsole
+    No working controllers found
+    Net:   No ethernet found.
+    Working FDT set to c0000000
+    Hit any key to stop autoboot:  0
+
+    Device 0: unknown device
+
+    Device 1: unknown device
+    scanning bus for devices...
+
+    Device 0: unknown device
+    starting USB...
+    No working controllers found
+    No ethernet found.
+    No ethernet found.
+    => exception sregs
+    stvec   : 0x00000000af6f4400
+    sie     : 0x0000000000000000
+    sip     : 0x0000000000000000
+    sstatus : 0x8000000200006000
+    => exception enable
+    => exception sregs
+    stvec   : 0x0000000000000000
+    sie     : 0x0000000000000222
+    sip     : 0x0000000000000000
+    sstatus : 0x8000000200006002
+    => mw 0x40014000 0xffffffff # Disable clock interrupt
+    => md 0x40801000 1 # Show pending interrupts (should be 0x10)
+    40801000: 00000010                             ....
+    => mw 0x40802000 0x10 # Enable interrupt for source 4 (timer)
+    => mw 0x40800010 0xff # Make source 4 priority large
+    <i
+    sbi_trap_error: hart0: trap0: unhandled local interrupt (error -1000)
+
+    sbi_trap_error: hart0: trap0: mcause=0x800000000000000b mtval=0x0000000000000000
+    sbi_trap_error: hart0: trap0: mepc=0x00000000af71df28 mstatus=0x8000000a00006802
+    sbi_trap_error: hart0: trap0: ra=0x00000000af71df28 sp=0x00000000aeed2b00
+    sbi_trap_error: hart0: trap0: gp=0x00000000aeed2dd0 tp=0x0000000000000000
+    sbi_trap_error: hart0: trap0: s0=0x00000000af7cca38 s1=0x0000000000000000
+    sbi_trap_error: hart0: trap0: a0=0x0000000000000000 a1=0x0000000000000002
+    sbi_trap_error: hart0: trap0: a2=0x0000000000000008 a3=0x0000000000000004
+    sbi_trap_error: hart0: trap0: a4=0xffffffffffffffff a5=0x0000000040800014
+    sbi_trap_error: hart0: trap0: a6=0x0000000000000008 a7=0x00000000af794b08
+    sbi_trap_error: hart0: trap0: s2=0x0000000000000000 s3=0x00000000aeed4b90
+    sbi_trap_error: hart0: trap0: s4=0x0000000000000003 s5=0x00000000af7f7754
+    sbi_trap_error: hart0: trap0: s6=0x0000000000000000 s7=0x0000000000000000
+    sbi_trap_error: hart0: trap0: s8=0x0000000000000000 s9=0x0000000000000000
+    sbi_trap_error: hart0: trap0: s10=0x00000000aeed4bc0 s11=0x0000000000000000
+    sbi_trap_error: hart0: trap0: t0=0x00000000aeed2ac0 t1=0x0000000000000039
+    sbi_trap_error: hart0: trap0: t2=0x3b3d74696e695f64 t3=0x0000000000000010
+    sbi_trap_error: hart0: trap0: t4=0x0000000000000000 t5=0x61745f746f6f627b
+    sbi_trap_error: hart0: trap0: t6=0x00000000aeed2aa0
+
+Let's revert the stvec to its original value and try again and see if we can see
+the delegation properly being handed to the supervisor handler.
diff --git a/uboot-exception-extras.patch b/uboot-exception-extras.patch
index 7f35966..b2511ba 100644
--- a/uboot-exception-extras.patch
+++ b/uboot-exception-extras.patch
@@ -1,8 +1,8 @@
 diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c
-index f38f454a0b..9bc554b0aa 100644
+index f38f454a0b..9de4effe47 100644
 --- a/cmd/riscv/exception.c
 +++ b/cmd/riscv/exception.c
-@@ -56,6 +56,41 @@ static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
+@@ -56,6 +56,40 @@ static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
  	return CMD_RET_FAILURE;
  }
  
@@ -33,7 +33,6 @@ index f38f454a0b..9bc554b0aa 100644
 +	asm volatile (
 +		"csrsi sstatus, 2\n" /* Enable SIE */
 +		"csrs sie, %0\n" /* Enable selected interrupts */
-+		"csrwi stvec, 0\n" /* Redirect trap handler to NULL */
 +		: /* no output */
 +		: "r" (which)
 +	);
@@ -44,7 +43,7 @@ index f38f454a0b..9bc554b0aa 100644
  static struct cmd_tbl cmd_sub[] = {
  	U_BOOT_CMD_MKENT(compressed, CONFIG_SYS_MAXARGS, 1, do_compressed,
  			 "", ""),
-@@ -67,6 +102,10 @@ static struct cmd_tbl cmd_sub[] = {
+@@ -67,6 +101,10 @@ static struct cmd_tbl cmd_sub[] = {
  			 "", ""),
  	U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
  			 "", ""),
@@ -55,7 +54,7 @@ index f38f454a0b..9bc554b0aa 100644
  };
  
  static char exception_help_text[] =
-@@ -77,6 +116,8 @@ static char exception_help_text[] =
+@@ -77,6 +115,8 @@ static char exception_help_text[] =
  	"  ialign16   - 16 bit aligned instruction\n"
  	"  undefined  - illegal instruction\n"
  	"  unaligned  - load address misaligned\n"