Enable SEIE in MIE directly from machine mode
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@ -333,6 +333,7 @@
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patches = [
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./opensbi-timer-debug.patch
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#./opensbi-enable-meip.patch
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./opensbi-enable-seip.patch
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./opensbi-dump-mregs.patch
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#./opensbi-dont-delegate.patch
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#./ox-alveo-platform-plic.patch
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24
opensbi-enable-seip.patch
Normal file
24
opensbi-enable-seip.patch
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@ -0,0 +1,24 @@
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diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
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index 0ae604a..dd4592a 100644
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--- a/lib/sbi/sbi_irqchip.c
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+++ b/lib/sbi/sbi_irqchip.c
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@@ -37,8 +37,7 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
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if (rc)
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return rc;
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- if (ext_irqfn != default_irqfn)
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- csr_set(CSR_MIE, MIP_MEIP);
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+ csr_set(CSR_MIE, MIP_SEIP);
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return 0;
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}
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@@ -47,8 +46,7 @@ void sbi_irqchip_exit(struct sbi_scratch *scratch)
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{
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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- if (ext_irqfn != default_irqfn)
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- csr_clear(CSR_MIE, MIP_MEIP);
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+ csr_clear(CSR_MIE, MIP_SEIP);
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sbi_platform_irqchip_exit(plat);
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}
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