From 4d246ad00e6b7e1d30d3ade3dcf0121aa96723d7 Mon Sep 17 00:00:00 2001
From: Rodrigo Arias Mallo <rodrigo.arias@bsc.es>
Date: Mon, 8 Jul 2024 10:44:51 +0200
Subject: [PATCH] Enable secondary serial console

---
 JOURNAL.md  |  4 ++++
 ox-plic.dts | 26 ++++++++++++--------------
 2 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/JOURNAL.md b/JOURNAL.md
index f12291c..c0d3dc2 100644
--- a/JOURNAL.md
+++ b/JOURNAL.md
@@ -828,3 +828,7 @@ anything and why the heartbeat stops.
 
 <!--}}}-->
 
+Fran has created another bitstream with two consoles enabled
+(`ox_u55c_a234c132.bit`), let see if I manage to boot with it.
+
+First I will need to enable the consoles on the DTS.
diff --git a/ox-plic.dts b/ox-plic.dts
index 31cf650..f66ce9a 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -7,7 +7,7 @@
 
 	aliases {
 		serial0 = &uart_console; // ttyS0
-//		serial1 = &uart_testing; // ttyS1
+		serial1 = &uart_testing; // ttyS1
 	};
 
 //	chosen {
@@ -120,8 +120,6 @@
 		uart_console: serial@40001000 {
 			compatible = "ns16550";
 			reg = <0x0 0x40001000 0x0 0x1000>;
-			interrupts = <1>; /* Output interrupt 1 */
-			interrupt-parent = <&PLIC>;
 			reg-shift = <2>;
 			/* No interrupts for this UART, use console=hvc0 */
 			/* This clock is the SERIAL_CLK */
@@ -129,17 +127,17 @@
 			current-speed = <115200>;
 			status = "okay";
 		};
-//		/* The serial for interrupt tests */
-//		uart_testing: serial@40003000 {
-//			compatible = "ns16550";
-//			reg = <0x0 0x40003000 0x0 0x1000>;
-//			interrupts = <1>; /* Output interrupt 1 */
-//			interrupt-parent = <&PLIC>;
-//			reg-shift = <2>;
-//			clock-frequency = <50000000>;
-//			current-speed = <115200>;
-//			status = "okay";
-//		};
+		/* The serial for interrupt tests */
+		uart_testing: serial@40003000 {
+			compatible = "ns16550";
+			reg = <0x0 0x40003000 0x0 0x1000>;
+			interrupts = <1>; /* Output interrupt 1 */
+			interrupt-parent = <&PLIC>;
+			reg-shift = <2>;
+			clock-frequency = <50000000>;
+			current-speed = <115200>;
+			status = "okay";
+		};
 
 //		ethernet0 {
 //			xlnx,rxmem = <0x000005f2>;