Print registers in supervisor
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706d858347
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2c5f8a8ccf
@ -1,5 +1,5 @@
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diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
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index 0ae604a..177fb6b 100644
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index 0ae604a..54449c7 100644
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--- a/lib/sbi/sbi_irqchip.c
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+++ b/lib/sbi/sbi_irqchip.c
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@@ -9,6 +9,9 @@
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@ -25,7 +25,7 @@ index 0ae604a..177fb6b 100644
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return 0;
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}
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@@ -47,8 +52,158 @@ void sbi_irqchip_exit(struct sbi_scratch *scratch)
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@@ -47,8 +52,161 @@ void sbi_irqchip_exit(struct sbi_scratch *scratch)
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{
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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@ -61,11 +61,12 @@ index 0ae604a..177fb6b 100644
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+#define MSTATUS_MPP_MASK (3 << 11)
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+#define MSTATUS_MPP_SUPERVISOR (1 << 11)
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+
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+static void dumpregs(void)
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+static void dumpregs(int machine)
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+{
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+ char *prefix = "\t";
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+ char *suffix = "\t";
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+ sbi_printf("Registers:\n");
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+ if (machine) {
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+ sbi_printf("%sMIE%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_MIE));
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+ sbi_printf("%sMIP%s: 0x%" PRILX "\n",
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@ -74,6 +75,7 @@ index 0ae604a..177fb6b 100644
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+ prefix, suffix, csr_read(CSR_MSTATUS));
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+ sbi_printf("%sMIDELEG%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_MIDELEG));
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+ }
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+ sbi_printf("%sSIE%s: 0x%" PRILX "\n",
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+ prefix, suffix, csr_read(CSR_SIE));
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+ sbi_printf("%sSIP%s: 0x%" PRILX "\n",
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@ -105,6 +107,7 @@ index 0ae604a..177fb6b 100644
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+static int supervisor_mode_code(void)
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+{
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+ sbi_printf("Hello from supervisor\n");
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+ dumpregs(0);
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+ sbi_printf("Waiting for interrupt...\n");
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+ int i = 0;
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+ char *s = "-\\|/";
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@ -141,7 +144,7 @@ index 0ae604a..177fb6b 100644
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+ csr_set(CSR_STVEC, &supervisor_trap_entry);
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+ sbi_printf("Enabled supervisor delegation:\n");
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+
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+ dumpregs();
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+ dumpregs(1);
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+
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+ /* Configure PLIC aux timer input */
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+ volatile unsigned *plic_priority = (unsigned *)(PLIC_BASE + PLIC_PRIORITY_OFFSET + PLIC_TIMER_PORT * 4);
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@ -177,7 +180,7 @@ index 0ae604a..177fb6b 100644
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+ sbi_printf("Timer alarm programmed\n");
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+ sbi_printf("Switching to supervisor\n");
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+
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+ dumpregs();
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+ dumpregs(1);
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+
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+ switch_to_supervisor_mode(&supervisor_mode_code);
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+
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