nixos-riscv/opensbi-lagarto-ox.patch

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diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c
index 2317a89..4a83ca9 100644
--- a/platform/fpga/openpiton/platform.c
+++ b/platform/fpga/openpiton/platform.c
@@ -17,17 +17,17 @@
#include <sbi_utils/serial/uart8250.h>
#include <sbi_utils/timer/aclint_mtimer.h>
-#define OPENPITON_DEFAULT_UART_ADDR 0xfff0c2c000
-#define OPENPITON_DEFAULT_UART_FREQ 60000000
+#define OPENPITON_DEFAULT_UART_ADDR 0x40001000
+#define OPENPITON_DEFAULT_UART_FREQ 50000000
#define OPENPITON_DEFAULT_UART_BAUDRATE 115200
#define OPENPITON_DEFAULT_UART_REG_SHIFT 0
#define OPENPITON_DEFAULT_UART_REG_WIDTH 1
-#define OPENPITON_DEFAULT_UART_REG_OFFSET 0
+#define OPENPITON_DEFAULT_UART_REG_OFFSET 0x1000
#define OPENPITON_DEFAULT_PLIC_ADDR 0xfff1100000
#define OPENPITON_DEFAULT_PLIC_SIZE (0x200000 + \
(OPENPITON_DEFAULT_HART_COUNT * 0x1000))
#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
-#define OPENPITON_DEFAULT_HART_COUNT 3
+#define OPENPITON_DEFAULT_HART_COUNT 1
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
#define OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ 1000000
#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \