nixos-riscv/overlay.nix

final: prev:

# Changes to packages from nixpkgs

{
  blis = ((prev.blis.override {
    blas64 = true;
    withArchitecture = "generic";
  }).overrideAttrs (old: {
    nativeBuildInputs = (old.nativeBuildInputs or []) ++ [
      prev.buildPackages.gfortran
    ];
  })).overrideDerivation (old : {
    configureFlags = [
      "--enable-cblas"
      "--blas-int-size=64"
      "--enable-threading=openmp"
      #"--build=x86_64-unknown-linux-gnu"
      #"--host=riscv64-unknown-linux-gnu"
      "generic"
    ];
  });

  unalignedCheck = prev.stdenv.mkDerivation {
    name = "unaligned-check";
    src = ./unalign.c;
    unpackPhase = ''
      cp ${./unalign.c} unalign.c
    '';
    dontConfigure = true;
    buildPhase = ''
      $CC unalign.c -o unalign_check
    '';
    installPhase = ''
      mkdir -p $out/bin
      cp unalign_check $out/bin/
    '';
  };

  csrtool = prev.pkgsStatic.stdenv.mkDerivation {
    name = "csrtool";
    src = ./csrtool.c;
    unpackPhase = ''
      cp ${./csrtool.c} csrtool.c
    '';
    dontConfigure = true;
    buildPhase = ''
      $CC -static csrtool.c -o csrtool
    '';
    installPhase = ''
      mkdir -p $out/bin
      cp csrtool $out/bin/
    '';
  };

  memtool = prev.pkgsStatic.stdenv.mkDerivation {
    name = "memtool";
    src = ./memtool.c;
    unpackPhase = ''
      cp ${./memtool.c} memtool.c
    '';
    dontConfigure = true;
    buildPhase = ''
      $CC -static memtool.c -o memtool
    '';
    installPhase = ''
      mkdir -p $out/bin
      cp memtool $out/bin/
    '';
  };

  bitstreams = builtins.fetchGit {
    url = "git@bscpm03.bsc.es:rarias/bitstreams.git";
    rev = "d02b4805002d43519a69d17d19488c065f3574f9";
  };

  # Baremetal tests for standalone FPGA
  sa-fpga-tests = prev.pkgsStatic.stdenv.mkDerivation {
    name = "sa-fpga-tests";
    src = builtins.fetchGit {
      url = "git@gitlab-internal.bsc.es:hwdesign/rtl/core-tile/sa-fpga.git";
      rev = "6547e63f3aed312a4c36f093b5e6421c7f1704f6";
      ref = "ni/supervisor_tests";
    };
    dontConfigure = true;
    patches = [
      #./sa-fpga-crt.patch
      #./sa-fpga-text-address.patch
      ./sa-fpga-uart.patch
    ];
    buildPhase = ''
      cd fpga_core_bridge/simulator/tests/c_tests/
      make RISCV_PREFIX=riscv64-unknown-linux-musl-

      # Generate binary images to be loaded in memory
      for f in *.riscv; do
        # Don't copy 0x40000000 section
        $OBJCOPY -R .tohost -O binary $f $f.bin
      done
    '';
    installPhase = ''
      ls -lah
      make install install_dir=$out
      cp -a *.bin $out
    '';
    dontFixup = true;
    hardeningDisable = [ "all" ];
  };

}