nixos-riscv/bootrom/rbootrom.S

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/*
* Copyright (c) 2024, Barcelona Supercomputing Center (BSC)
* SPDX-License-Identifier: MIT
*
* RBOOTROM v1.0
* Modified by Rodrigo Arias Mallo <rodrigo.arias@bsc.es>
*
* This is a custom bootrom that prints some information to the UART when
* starting, as well as when it hangs. It assumes the UART is at UART_BASE and
* it will jump to DRAM_BASE to continue the boot.
*/
#define DRAM_BASE 0x80000000
#define UART_BASE 0x40001000
.macro PUTC, ch
li a0, \ch
jal putchar
.endm
.section .text.start, "ax", @progbits
.globl _start
_start:
jal print_hello // Print initial message on HART 0 only
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la t0, _hang
csrw mtvec, t0 // Set the machine trap vector
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csrr a0, mhartid // Load HART ID into a0
li s0, DRAM_BASE // Load next address into s0
jr s0 // Jump to s0
.section .text.hang, "ax", @progbits
.globl _hang
_hang:
PUTC '\n'
PUTC '\r'
PUTC 'R'
PUTC 'B'
PUTC 'O'
PUTC 'O'
PUTC 'T'
PUTC 'R'
PUTC 'O'
PUTC 'M'
PUTC ' '
PUTC 'H'
PUTC 'A'
PUTC 'N'
PUTC 'G'
PUTC '\n'
PUTC '\r'
/* Hang */
csrr a0, mhartid
1:
wfi
j 1b
.section .text, "ax", @progbits
putchar:
// Wait a bit before writing to UART
li t0, 100000 // Delay a bit
1:
addi t0, t0, -1 // Decrement
bne t0, zero, 1b // Repeat if not zero
// Write the character now
la t0, UART_BASE // Transmitter Holding Buffer
sb a0, 0(t0) // Write a0 byte
ret
print_hello:
csrr t0, mhartid // Load HART ID into a0
beq t0, zero, 1f // Print message on HART 0 only
ret
1:
mv s0, ra // Save return address
PUTC '\n' // Identify bootroom
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PUTC '\r'
PUTC 'R'
PUTC 'B'
PUTC 'O'
PUTC 'O'
PUTC 'T'
PUTC 'R'
PUTC 'O'
PUTC 'M'
PUTC ' '
PUTC 'v'
PUTC '1'
PUTC '.'
PUTC '0'
PUTC ' '
PUTC ':'
PUTC '^'
PUTC ')'
PUTC '\n'
PUTC '\r'
// Print jumping address
PUTC 'J'
PUTC 'u'
PUTC 'm'
PUTC 'p'
PUTC 'i'
PUTC 'n'
PUTC 'g'
PUTC ' '
PUTC 't'
PUTC 'o'
PUTC ' '
PUTC '0' // TODO: Compute from DRAM_BASE
PUTC 'x'
PUTC '8'
PUTC '0'
PUTC '0'
PUTC '0'
PUTC '_'
PUTC '0'
PUTC '0'
PUTC '0'
PUTC '0'
PUTC '.'
PUTC '.'
PUTC '.'
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PUTC '\n'
PUTC '\r'
mv ra, s0 // Restore return address
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ret