32 lines
1.0 KiB
Diff
32 lines
1.0 KiB
Diff
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diff --git a/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c b/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c
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index 278ea97..287e5fc 100644
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--- a/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c
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+++ b/fpga_core_bridge/simulator/tests/c_tests/common/syscalls.c
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@@ -592,8 +592,18 @@ int uart_is_transmit_empty() {
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// Function to write a character to the UART
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void uart_write_char(char c) {
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- while (!uart_is_transmit_empty());
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+ //while (!uart_is_transmit_empty());
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+
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+ /* Delay it a bit, as checking the transmit holding register doesn't seem to
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+ * work in the FPGA */
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+ for (volatile long i = 0; i < 10000; i++)
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+ ;
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+
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*(volatile uint8_t *)(UART_BASE + UART_THR) = c;
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+
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+ /* Make new line go back to the start of the line */
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+ if (c == '\n')
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+ uart_write_char('\r');
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}
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// Function to write a string to the UART
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@@ -602,4 +612,4 @@ void uart_write_string(const char* str) {
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uart_write_char(*str++);
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asm("fence");
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}
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-}
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\ No newline at end of file
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+}
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