diff --git a/ox-plic.dts b/ox-plic.dts
index 2bcce4c..e550464 100644
--- a/ox-plic.dts
+++ b/ox-plic.dts
@@ -128,17 +128,18 @@
 			current-speed = <115200>;
 			status = "okay";
 		};
-//		/* The serial for interrupt tests */
-//		uart_testing: serial@40003000 {
-//			compatible = "ns16550";
-//			reg = <0x0 0x40003000 0x0 0x1000>;
-////			interrupts = <1>; /* Output interrupt 1 */
-////			interrupt-parent = <&PLIC>;
-//			reg-shift = <2>;
-//			clock-frequency = <50000000>;
-//			current-speed = <115200>;
-//			status = "okay";
-//		};
+		/* The serial for interrupt tests */
+		uart_testing: serial@40003000 {
+			compatible = "ns16550";
+			reg = <0x0 0x40003000 0x0 0x1000>;
+			reg-shift = <2>;
+			/* Output interrupt 1 (the first one) */
+			interrupts = <1>;
+			interrupt-parent = <&PLIC>;
+			clock-frequency = <50000000>;
+			current-speed = <115200>;
+			status = "okay";
+		};
 
 //		ethernet0 {
 //			xlnx,rxmem = <0x000005f2>;
@@ -211,7 +212,7 @@
 			 */
 			interrupts-extended = <&HLIC0 11>, <&HLIC0 9>;
 			reg = < 0x0 0x40800000 0x0 0x00400000>;
-			riscv,ndev = <3>;
+			riscv,ndev = <4>;
 			//riscv,max-priority = <0x7>;
 			phandle = <0x3>;
 		};
@@ -230,6 +231,13 @@
 			interrupts-extended = <&HLIC0 3>, <&HLIC0 7>;
 			compatible = "riscv,clint0";
 		};
+		aux_timer: clint@40010000 {
+			reg = <0x0 0x40010000 0x0 0x00010000>;
+			reg-names = "control";
+			interrupts = <4>; /* PLIC input source 4 */
+			interrupt-parent = <&PLIC>;
+			compatible = "riscv,clint0";
+		};
 //		clint: clint@40002000 {
 //			/* MTIME and MTIMECMP address and size pairs */
 //			reg = <0x0 0x40002000 0x0 0x8>, <0x0 0x40002008 0x0 0x8>;